DG2523, DG2524 www.vishay.com Vishay Siliconix 0.4 , Low Resistance and Capacitance, Dual DPDT / Quad SPDT Analog Switch DESCRIPTION FEATURES The DG2523 and DG2524 are four-channel single-pole 1.8 V to 5.5 V single supply operation double-throw (SPDT) analog switches. The DG2523 has two Low resistance: 0.4 / typ. at 2.7 V control inputs that each controls a pair of single-pole Highly flat and matched R on double-throw (SPDT). It is also known as a two-channel Low parasitic capacitance, double-pole double-throw (DPDT) configuration. The C = 26 pF, C = 14.5 pF on off DG2524 has an EN pin to enable the device when the logic is low. Typical switch off leakage of 40 pA The parts are designed to operate from 1.8 V to 5.5 V single High bandwidth: 310 MHz power rail. All switches conduct equally well in both Guaranteed logic high 1.2 V, logic low 0.3 V directions, offering rail to rail signal witching and can be Break before make switching used both as multiplexers as well as de-multiplexers. Signal swing over V+ capable The parts feature low control logic threshold. Break-before-make switching is guaranteed. Power down protection The DG2523 and DG2524 exhibit low parasitic capacitance, Latch up current: 300 mA (JESD78) low leakage, and highly matched low and flat switch ESD/HBM: > 6 kV resistance over the full signal range characters that are Material categorization: for definitions of compliance important for precision analog designs. please see www.vishay.com/doc 99912 The high bandwidth and excellent total harmonic distortion (THD) performance make them ideal for both analog and APPLICATIONS digital signal switching in space constrain applications Automatic test equipment requiring high performance and efficient use of board space. Data acquisition systems The DG2523 and DG2524 come in Pb-free QFN-16 package Meters and instruments of 3 mm x 3 mm. Medical and healthcare systems BENEFITS Communication systems Low and flat resistance Audio and video signal routing Excellent total harmonic distortion Battery powered systems Computer peripherals Low parasitic capacitance Data storage Low voltage control interface Relay replacement FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION DG2523DN DG2524DN QFN-16 (3 x 3) QFN-16 (3 x 3) COM1 NO1 V+ NC4 COM1 NO1 V+ NC4 16 15 14 13 16 15 14 13 NC1 COM4 NC1 COM4 1 12 1 12 IN1, IN2 NO4 IN NO4 2 11 2 11 Control NO2 IN3, IN4 NO2 EN 3 10 3 10 COM2 COM2 NC3 NC3 49 49 56 7 8 56 7 8 NC2 GND NO3 COM3 NC2 GND NO3 COM3 Top View Top View S16-2128-Rev. A, 17-Oct-16 Document Number: 67894 1 For technical questions, contact: analogswitchtechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000DG2523, DG2524 www.vishay.com Vishay Siliconix TRUTH TABLE DG2523 TRUTH TABLE DG2524 INx NC1, 2, 3, and 4 NO1, 2, 3, and 4 EN LOGIC IN NC1, 2, 3, and 4 NO1, 2, 3, and 4 0On Off 1x Off Off 1Off On 0 0 On Off 01 Off On ORDERING INFORMATION TEMPERATURE RANGE PACKAGE PART NUMBER MIN. ORDER / PACK. QUANTITY DG2523DN-T1-GE4 -40 C to +85 C lead (Pb)-free QFN-16 (3 mm x 3 mm) Tape and reel, 2500 units DG2524DN-T1-GE4 ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A PARAMETER SYMBOL LIMITUNIT V+ -0.3 to +6 Reference to GND V a IN, COM, NC, NO -0.3 to (V+ + 0.3) Current (any terminal except NO, NC, or COM) 30 Continuous current (NO, NC, or COM) 300 mA Peak current (pulsed at 1 ms, 10 % duty cycle) 500 Storage temperature (D suffix) -65 to +150 C d Package solder reflow conditions QFN-16 250 b c Power dissipation (packages) QFN-16 1385 mW Notes a. Signals on NC, NO, or COM, or IN exceeding V+ will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC board. c. Derate 17.3 mW/C above 70 C. d. Manual soldering with iron is not recommended for leadless components. The miniQFN-16 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper lip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S16-2128-Rev. A, 17-Oct-16 Document Number: 67894 2 For technical questions, contact: analogswitchtechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000