74VHC373FT(BJ)

74VHC373FT CMOS Digital Integrated Circuits Silicon Monolithic 74VHC373FT74VHC373FT74VHC373FT74VHC373FT 1. 1. Functional DescriptionFunctional Description 1. 1. Functional DescriptionFunctional Description Octal D-Type Latch with 3-State Outputs 2. 2. 2. 2. GeneralGeneralGeneralGeneral The 74VHC373FT is an advanced high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable input (OE). When the OE input is high, the eight outputs are in a high impedance state. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. 3. 3. FeaturesFeatures 3. 3. FeaturesFeatures (1) AEC-Q100 (Grade 1) qualified (Note 1) (2) Wide operating temperature range: T = -40 to 125 opr (3) High speed: Propagation delay time = 5.0 ns (typ.) at V = 5 V CC (4) Low power dissipation: I = 4 A (max) at T = 25 CC a (5) High noise immunity: V = V = 28% V (min) NIH NIL CC (6) Power-down protection is provided on all inputs. (7) Balanced propagation delays: t t PLH PHL (8) Wide operating voltage range: V = 2 V to 5.5 V CC(opr) (9) Low noise: V = 0.8 V (max) OLP (10) Pin and function compatible with the 74 series (74AC/HC/AHC/LV etc.) 373 type. Note 1: For detail information, please contact to our sales. 4. 4. 4. 4. PackagingPackagingPackagingPackaging TSSOP20B Start of commercial production 2014-03 2015 Toshiba Corporation 2015-11-13 1 Rev.2.074VHC373FT 5. 5. 5. 5. Pin AssignmentPin AssignmentPin AssignmentPin Assignment 6. 6. 6. 6. MarkingMarkingMarkingMarking 7. 7. 7. 7. IEC Logic SymbolIEC Logic SymbolIEC Logic SymbolIEC Logic Symbol 2015 Toshiba Corporation 2015-11-13 2 Rev.2.0