Product Information

74HC166D(BJ)

74HC166D(BJ) electronic component of Toshiba

Datasheet
Counter Shift Registers 74HC CMOS logic IC series 6V 16 pins

Manufacturer: Toshiba
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Price (AUD)

1: AUD 1.0928 ( AUD 1.2 Inc GST) ea
Line Total: AUD 1.0928 ( AUD 1.2 Inc GST)

14324 - Global Stock
Ships to you between
Fri. 26 Jul to Tue. 30 Jul
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
11889 - Global Stock


Ships to you between Fri. 26 Jul to Tue. 30 Jul

MOQ : 1
Multiples : 1

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74HC166D(BJ)
Toshiba

1 : AUD 0.6911
10 : AUD 0.5777
100 : AUD 0.4366
500 : AUD 0.353
1000 : AUD 0.2917
2500 : AUD 0.2545
10000 : AUD 0.2415
25000 : AUD 0.2396
50000 : AUD 0.234

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
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Logic Family
Logic Type
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Input Type
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Low Level Output Current
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Factory Pack Quantity :
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Notes:- Show Stocked Products With Similar Attributes.

74HC166D CMOS Digital Integrated Circuits Silicon Monolithic 74HC166D74HC166D74HC166D74HC166D 1. 1. Functional DescriptionFunctional Description 1. 1. Functional DescriptionFunctional Description 8-Bit Shift Register (P-IN, S-OUT) 2. 2. 2. 2. GeneralGeneralGeneralGeneral The 74HC166D is a high speed CMOS 8-BIT PARALLEL/SERIAL-IN, SERIAL-OUT SHIFT REGISTER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. It consists of parallel-in or serial-in, serial-out 8-bit shift register with a gated clock input and an overriding clear input. The parallel-in or serial-in modes are controlled by the SHIFT/LOAD input. When the SHIFT/LOAD input is held high, the serial data input is enabled and the eight flip-flops perform serial shifting on each clock pulse. When held low, the parallel data inputs are enabled and synchronous loading occurs on the next clock pulse. Clocking is accomplished on the low-to-high transition of the clock pulse. The CK-INH input should be shifted high only while the CK input is held high. A direct clear input overrides all other inputs, including the clock, and sets all the flip-flops to zero. Functional details are shown in the truth table and the timing charts. All inputs are equipped with protection circuits against static discharge or transient excess voltage. 3. 3. FeaturesFeatures 3. 3. FeaturesFeatures (1) High speed: f = 57 MHz (typ.) at V = 5 V MAX CC (2) Low power dissipation: I = 4.0 A (max) at T = 25 CC a (3) Balanced propagation delays: t t PLH PHL (4) Wide operating voltage range: V = 2.0 V to 6.0 V CC(opr) 4. 4. 4. 4. PackagingPackagingPackagingPackaging SOIC16 Start of commercial production 2016-05 2016 Toshiba Corporation 2016-08-04 1 Rev.3.074HC166D 5. 5. 5. 5. Pin AssignmentPin AssignmentPin AssignmentPin Assignment 6. 6. 6. 6. MarkingMarkingMarkingMarking 7. 7. 7. 7. IEC Logic SymbolIEC Logic SymbolIEC Logic SymbolIEC Logic Symbol 2016 Toshiba Corporation 2016-08-04 2 Rev.3.0

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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