STM8AF526x/8x/Ax
STM8AF6269/8x/Ax
Automotive 8-bit MCU, with up to 128 Kbyte Flash, data EEPROM,
10-bit ADC, timers, LIN, CAN, USART, SPI, I2C, 3 to 5.5 V
Datasheet - production data
Features
AEC-Q10x qualified
Core
LQFP80 14x14 mm LQFP64 10x10 mm LQFP48 7x7 mm
Max f : 24 MHz
CPU
Advanced STM8A core with Harvard
architecture and 3-stage pipeline
Average 1.6 cycles/instruction resulting in
10 MIPS at 16 MHz f for industry
CPU
standard benchmark
LQFP32 7x7 mm VFQFP32 5x5 mm
Memories
Highly robust I/O design, immune against
Program memory: 32 to 128 Kbyte Flash
current injection
program; data retention 20 years at 55 C
Communication interfaces
Data memory: up to 2 Kbyte true data
High speed 1 Mbit/s CAN 2.0B interface
EEPROM; endurance 300 kcycle
USART with clock output for synchronous
RAM: 6 Kbyte
operation - LIN master mode
Clock management
LINUART LIN 2.2 compliant, master/slave
Low-power crystal resonator oscillator with
modes with automatic resynchronization
external clock input
SPI interface up to 10 Mbit/s or f /2
MASTER
2
Internal, user-trimmable 16 MHz RC and
I C interface up to 400 Kbit/s
low-power 128 kHz RC oscillators
Analog to digital converter (ADC)
Clock security system with clock monitor
10-bit resolution, 2 LSB TUE, 1 LSB
Reset and supply management
linearity and up to 16 multiplexed channels
Wait/auto-wakeup/Halt low-power modes
Operating temperature up to 150 C
with user definable clock gating
Qualification conforms to AEC-Q100 grade 0
Low consumption power-on and power-
down reset
(1)
Table 1. Device summary
Interrupt management
Reference Part number
Nested interrupt controller with 32 vectors
Up to 37 external interrupts on 5 vectors
STM8AF5268, STM8AF5269,
Timers STM8AF5286, STM8AF5288,
STM8AF526x/8x/Ax
STM8AF5289, STM8AF528A,
2 general purpose 16-bit timers with up to 3
(with CAN)
STM8AF52A6, STM8AF52A8,
CAPCOM channels each (IC, OC, PWM)
STM8AF52A9, STM8AF52AA
Advanced control timer: 16-bit, 4 CAPCOM
channels, 3 complementary outputs, dead-
STM8AF6269, STM8AF6286,
time insertion and flexible synchronization
STM8AF6288, STM8AF6289,
8-bit AR basic timer with 8-bit prescaler STM8AF6269/8x/Ax STM8AF628A, STM8AF62A6,
STM8AF62A8, STM8AF62A9,
Auto-wakeup timer
STM8AF62AA
Window and independent watchdog timers
1. In the order code, F applies to devices with Flash
I/Os
program memory and data EEPROM. F is replaced
Up to 68 user pins (11 high sink I/Os)
by P for devices with FASTROM (see Table 2,
Table 3 and Figure 60).
November 2016 DocID14395 Rev 15 1/125
This is information on a product in full production. www.st.comContents STM8AF526x/8x/Ax STM8AF6269/8x/Ax
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3 Product line-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5 Product overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1 STM8A central processing unit (CPU) . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1.1 Architecture and registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1.2 Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1.3 Instruction set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.2 Single wire interface module (SWIM) and debug module (DM) . . . . . . . . 15
5.2.1 SWIM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.2.2 Debug module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.3 Interrupt controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.4 Flash program and data EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.4.1 Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.4.2 Write protection (WP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.4.3 Protection of user boot code (UBC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.4.4 Read-out protection (ROP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.5 Clock controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.5.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.5.2 16 MHz high-speed internal RC oscillator (HSI) . . . . . . . . . . . . . . . . . . 17
5.5.3 128 kHz low-speed internal RC oscillator (LSI) . . . . . . . . . . . . . . . . . . . 18
5.5.4 24 MHz high-speed external crystal oscillator (HSE) . . . . . . . . . . . . . . . 18
5.5.5 External clock input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.5.6 Clock security system (CSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.6 Low-power operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.7 Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.7.1 Watchdog timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.7.2 Auto-wakeup counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.7.3 Beeper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2/125 DocID14395 Rev 15