STM32F446xx ARM Cortex -M4 32b MCU+FPU, 225DMIPS, up to 512kB Flash/128+4KB RAM, USB OTG HS/FS, 17 TIMs, 3 ADCs, 20 comm. interfaces Datasheet - production data Features Core: ARM 32-bit Cortex -M4 CPU with FPU, Adaptive real-time accelerator (ART LQFP64 (10 10mm) Accelerator) allowing 0-wait state execution LQFP100 (14 14mm) UFBGA144 (7 x 7 mm) WLCSP 81 LQFP144 (20 x 20 mm) from Fl ash memory, frequency up to 180 MHz, UFBGA144 (10 x 10 mm) MPU, 225 DMIPS/1.25 DMIPS/MHz Up to 114 I/O ports with interrupt capability (Dhrystone 2.1), and DSP instructions Up to 111 fast I/Os up to 90 MHz Memories Up to 112 5 V-tolerant I/Os 512 kB of Flash memory Up to 20 communication interfaces 128 KB of SRAM SPDIF-Rx 2 Flexible external memory controller with up Up to 4 I C interfaces (SMBus/PMBus) to 16-bit data bus: Up to 4 USARTs/2 UARTs (11.25 Mbit/s, SRAM,PSRAM,SDRAM/LPSDR SDRAM, ISO7816 interface, LIN, IrDA, modem Flash NOR/NAND memories control) 2 Dual mode Quad SPI interface Up to 4 SPIs (45 Mbits/s), 3 with muxed I S LCD parallel interface, 8080/6800 modes for audio class accuracy via internal audio Clock, reset and supply management PLL or external clock 1.7 V to 3.6 V application supply and I/Os 2 x SAI (serial audio interface) POR, PDR, PVD and BOR 2 CAN (2.0B Active) 4-to-26 MHz crystal oscillator SDIO interface Internal 16 MHz factory-trimmed RC (1% Consumer electronics control (CEC) I/F accuracy) Advanced connectivity 32 kHz oscillator for RTC with calibration USB 2.0 full-speed device/host/OTG Internal 32 kHz RC with calibration controller with on-chip PHY Low power USB 2.0 high-speed/full-speed Sleep, Stop and Standby modes device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI V supply for RTC, 2032 bit backup BAT registers + optional 4 KB backup SRAM Dedicated USB power rail enabling on-chip PHYs operation throughout the entire MCU 312-bit, 2.4 MSPS ADC: up to 24 channels power supply range and 7.2 MSPS in triple interleaved mode 8- to 14-bit parallel camera interface up to 212-bit D/A converters 54 Mbytes/s General-purpose DMA: 16-stream DMA CRC calculation unit controller with FIFOs and burst support RTC: subsecond accuracy, hardware calendar Up to 17 timers: 2x watchdog, 1x SysTick timer and up to twelve 16-bit and two 32-bit timers up 96-bit unique ID to 180 MHz, each with up to 4 IC/OC/PWM or pulse counter Table 1. Device summary Debug mode Reference Part number SWD & JTAG interfaces STM32F446MC, STM32F446ME, Cortex -M4 Trace Macrocell STM32F446RC, STM32F446RE, STM32F446xx STM32F446VC, STM32F446VE, STM32F446ZC, STM32F446ZE. May 2015 DocID027107 Rev 3 1/198 This is information on a product in full production. www.st.comContents STM32F446xx Contents 1 Introduction . 11 2 Description 12 2.1 Compatibility with STM32F4 family . 14 3 Functional overview 17 3.1 ARM Cortex -M4 with FPU and embedded Flash and SRAM . 17 3.2 Adaptive real-time memory accelerator (ART Accelerator) . 17 3.3 Memory protection unit . 17 3.4 Embedded Flash memory 18 3.5 CRC (cyclic redundancy check) calculation unit . 18 3.6 Embedded SRAM . 18 3.7 Multi-AHB bus matrix 18 3.8 DMA controller (DMA) . 19 3.9 Flexible memory controller (FMC) 20 3.10 Quad SPI memory interface (QUADSPI) . 20 3.11 Nested vectored interrupt controller (NVIC) . 21 3.12 External interrupt/event controller (EXTI) . 21 3.13 Clocks and startup 21 3.14 Boot modes . 22 3.15 Power supply schemes 22 3.16 Power supply supervisor . 22 3.16.1 Internal reset ON 22 3.16.2 Internal reset OFF . 22 3.17 Voltage regulator . 23 3.17.1 Regulator ON . 24 3.17.2 Regulator OFF 25 3.17.3 Regulator ON/OFF and internal reset ON/OFF availability 27 3.18 Real-time clock (RTC), backup SRAM and backup registers 27 3.19 Low-power modes 28 3.20 V operation . 29 BAT 3.21 Timers and watchdogs . 30 2/198 DocID027107 Rev 3