SPC563M64x, SPC563M60x 32-bit Power Architecture based MCU for automotive powertrain applications Datasheet - production data Up to 94 Kbyte on-chip static RAM (including up to 32 Kbyte standby RAM) Boot Assist Module (BAM) 144 LQFP 176 LQFP 32-channel second-generation enhanced Time 20 mm x 20 mm 24 mm x 24 mm Processor Unit (eTPU) 32 standard eTPU channels Architectural enhancements to improve Features code efficiency and added flexibility Single issue, 32-bit Power Architecture Book 16-channels enhanced Modular Input-Output E compliant e200z335 CPU core complex System (eMIOS) Includes Variable Length Encoding (VLE) Enhanced Queued Analog-to-Digital Converter enhancements for code size reduction (eQADC) 32-channel Direct Memory Access controller Decimation filter (part of eQADC) (DMA) Silicon die temperature sensor Interrupt Controller (INTC) capable of handling 364 selectable-priority interrupt sources: 191 2 Deserial Serial Peripheral Interface (DSPI) peripheral interrupt sources, 8 software modules (compatible with Microsecond Bus) interrupts and 165 reserved interrupts. 2 enhanced Serial Communication Interface Frequency-Modulated Phase-Locked Loop (eSCI) modules compatible with LIN (FMPLL) 2 Controller Area Network (FlexCAN) modules (a) Calibration External Bus Interface (EBI) that support CAN 2.0B System Integration Unit (SIU) Nexus Port Controller (NPC) per IEEE-ISTO Up to 1.5 Mbyte on-chip Flash with Flash 5001-2003 standard controller IEEE 1149.1 (JTAG) support Fetch Accelerator for single cycle Flash Nexus interface access 80 MHz On-chip voltage regulator controller that provides 1.2 V and 3.3 V internal supplies from a 5 V external source. a. The external bus interface is only accessible when Designed for LQFP144, and LQFP176 using the calibration tool. It is not available on production packages. Table 1. Device summary Part number Memory Flash size Package: LQFP144 Package: LQFP176 1536 Kbyte SPC563M64L5 SPC563M64L7 1024 Kbyte SPC563M60L5 SPC563M60L7 March 2016 DocID14642 Rev 12 1/128 This is information on a product in full production. www.st.comContents SPC563M64x, SPC563M60x Contents 1 Introduction 7 1.1 Document overview 7 1.2 Description . 7 2 Overview 8 2.1 Device comparison . 9 2.2 SPC563Mxx features 10 2.3 SPC563Mxx feature details . 19 2.3.1 e200z335 core 19 2.3.2 Crossbar 20 2.3.3 eDMA . 21 2.3.4 Interrupt controller . 21 2.3.5 FMPLL 22 2.3.6 Calibration EBI 23 2.3.7 SIU . 24 2.3.8 ECSM 25 2.3.9 Flash . 25 2.3.10 SRAM 26 2.3.11 BAM 26 2.3.12 eMIOS 26 2.3.13 eTPU2 27 2.3.14 eQADC . 29 2.3.15 DSPI . 31 2.3.16 eSCI 33 2.3.17 FlexCAN 34 2.3.18 System timers 35 2.3.19 Software Watchdog Timer (SWT) . 36 2.3.20 Debug features . 36 2.4 SPC563Mxx series architecture 39 2.4.1 Block diagram 39 2.4.2 Block summary . 39 3 Pinout and signal description 41 3.1 LQFP144 pinout 41 2/128 DocID14642 Rev 12