SPC560D30x SPC560D40x 32-bit MCU family built on the Power Architecture for automotive body electronics applications Datasheet production data Cross triggering unit (CTU) Dedicated diagnostic module for lighting Advanced PWM generation Time-triggered diagnostics LQFP64 (10 x 10 x 1.4 mm) PWM-synchronized ADC measurements LQFP100 (14 x 14 x 1.4 mm) Communications interfaces 1 FlexCAN interface (2.0B active) with Features 32 message buffers 3 LINFlex/UART, 1 with DMA capability AEC-Q100 qualified 2 DSPI High-performance up to 48 MHz e200z0h CPU Clock generation 32-bit Power Architecture technology 4 to 16 MHz fast external crystal oscillator CPU 16 MHz fast internal RC oscillator Variable length encoding (VLE) 128 kHz slow internal RC oscillator Memory Software-controlled FMPLL Up to 256 KB Code Flash with ECC Clock monitoring unit Up to 64 (4x16) KB Data Flash with ECC Exhaustive debugging capability Up to 16 KB SRAM with ECC Nexus1 on all packages Interrupts Nexus2+ available on emulation device 16 priority levels (SPC560B64B2-ENG) Non-maskable interrupt (NMI) On-chip CAN/UART bootstrap loader Up to 38 external interrupts including 18 wakeup lines Low power capabilities Several low power mode configurations 16-channel eDMA Ultra-low power standby with RTC, SRAM GPIOs: 45 (LQFP64), 79 (LQFP100) and CAN monitoring Timer units Fast wakeup schemes 4-channel 32-bit periodic interrupt timers Single 5 V or 3.3 V supply 4-channel 32-bit system timer module Operates in ambient temperature range of System watchdog timer -40 to 125 C 32-bit real-time clock timer 16-bit counter time-triggered I/Os Table 1. Device summary Up to 28 channels with PWM/MC/IC/OC Part number 5 independent counters Package 128 Kbyte code 256 Kbyte code 27-channels with ADC trigger capability Flash Flash 12-bit analog-to-digital converter (ADC) with up LQFP100 SPC560D30L3 SPC560D40L3 to 33 channels Up to 61 channels via external multiplexing LQFP64 SPC560D30L1 SPC560D40L1 Individual conversion registers November 2018 DS6494 Rev 8 1/82 This is information on a product in full production. www.st.com 1Contents SPC560D30x, SPC560D40x Contents 1 Introduction 4 1.1 Document overview 4 1.2 Description . 4 2 Block diagram 6 3 Package pinouts and signal descriptions 9 3.1 Package pinouts . 9 3.2 Pad configuration during reset phases . 10 3.3 Voltage supply pins . 10 3.4 Pad types 11 3.5 System pins 11 3.6 Functional ports 12 4 Electrical characteristics 24 4.1 Introduction . 24 4.2 Parameter classification 24 4.3 NVUSRO register . 25 4.3.1 NVUSRO PAD3V5V field description 25 4.3.2 NVUSRO OSCILLATOR MARGIN field description . 25 4.3.3 NVUSRO WATCHDOG EN field description 25 4.4 Absolute maximum ratings 26 4.5 Recommended operating conditions 27 4.6 Thermal characteristics 29 4.6.1 Package thermal characteristics 29 4.6.2 Power considerations 29 4.7 I/O pad electrical characteristics . 30 4.7.1 I/O pad types . 30 4.7.2 I/O input DC characteristics 30 4.7.3 I/O output DC characteristics . 32 4.7.4 Output pin transition times . 34 4.7.5 I/O pad current specification . 34 4.8 RESET electrical characteristics . 38 2/82 DS6494 Rev 8