SPC560B40x, SPC560B50x SPC560C40x, SPC560C50x 32-bit MCU family built on the Power Architecture for automotive body electronics applications Datasheet - production data Up to 6 FlexCAN interfaces (2.0B active) with 64-message objects each Up to 4 LINFlex/UART 3 DSPI / I2C LQFP100 (14 x 14 x 1.4 mm) LQFP64 (10 x 10 x 1.4 mm) Single 5 V or 3.3 V supply LQFP144 (20 x 20 x 1.4 mm) 10-bit analog-to-digital converter (ADC) with up to 36 channels Features Extendable to 64 channels via external multiplexing High-performance 64 MHz e200z0h CPU Individual conversion registers 32-bit Power Architecture technology Cross triggering unit (CTU) Up to 60 DMIPs operation Variable length encoding (VLE) Dedicated diagnostic module for lighting Advanced PWM generation Memory Time-triggered diagnostic Up to 512 KB Code Flash with ECC PWM-synchronized ADC measurements 64 KB Data Flash with ECC Up to 48 KB SRAM with ECC Clock generation 8-entry memory protection unit (MPU) 4 to 16 MHz fast external crystal oscillator (FXOSC) Interrupts 32 kHz slow external crystal oscillator 16 priority levels (SXOSC) Non-maskable interrupt (NMI) 16 MHz fast internal RC oscillator (FIRC) Up to 34 external interrupts incl. 18 wakeup 128 kHz slow internal RC oscillator (SIRC) lines Software-controlled FMPLL GPIO: 45(LQFP64), 75(LQFP100), Clock monitor unit (CMU) 123(LQFP144) Timer units Exhaustive debugging capability 6-channel 32-bit periodic interrupt timers Nexus1 on all devices 4-channel 32-bit system timer module Nexus2+ available on emulation package Software watchdog timer (LBGA208) Real-time clock timer Low power capabilities 16-bit counter time-triggered I/Os Ultra-low power standby with RTC, SRAM Up to 56 channels with PWM/MC/IC/OC and CAN monitoring ADC diagnostic via CTU Fast wakeup schemes Communications interface Operating temp. range up to -40 to 125 C Table 1. Device summary Part number Package 256 KB code Flash memory 512 KB code Flash memory LQFP144 SPC560B40L5 SPC560B50L5 LQFP100 SPC560B40L3 SPC560C40L3 SPC560B50L3 SPC560C50L3 (1) LQFP64 SPC560B40L1 SPC560C40L1 SPC560B50L1 SPC560C50L1 1. All LQFP64information is indicative and must be confirmed during silicon validation. February 2015 DocID14619 Rev 13 1/116 This is information on a product in full production. www.st.comContents SPC560B40x/50x, SPC560C40x/50x Contents 1 Introduction 8 1.1 Document overview 8 1.2 Description . 8 2 Block diagram . 11 3 Package pinouts and signal descriptions . 15 3.1 Package pinouts 15 3.2 Pad configuration during reset phases . 18 3.3 Voltage supply pins . 19 3.4 Pad types . 19 3.5 System pins . 20 3.6 Functional ports 20 3.7 Nexus 2+ pins . 39 3.8 Electrical characteristics 39 3.9 Introduction . 39 3.10 Parameter classification 40 3.11 NVUSRO register . 40 3.11.1 NVUSRO PAD3V5V field description 40 3.11.2 NVUSRO OSCILLATOR MARGIN field description . 41 3.11.3 NVUSRO WATCHDOG EN field description 41 3.12 Absolute maximum ratings 41 3.13 Recommended operating conditions 42 3.14 Thermal characteristics 44 3.14.1 Package thermal characteristics 44 3.14.2 Power considerations 45 3.15 I/O pad electrical characteristics . 46 3.15.1 I/O pad types . 46 3.15.2 I/O input DC characteristics 46 3.15.3 I/O output DC characteristics . 48 3.15.4 Output pin transition times . 50 3.15.5 I/O pad current specification . 51 2/116 DocID14619 Rev 13