74LCX32TTR

74LCX32 Low voltage CMOS 2-input OR gate with 5V tolerant inputs Features 5V tolerant inputs High speed: t = 5.2ns (Max) at V = 3V PD CC Power down protection on inputs and outputs Symmetrical output impedance: SO-14 TSSOP14 I = I = 24mA (Min) at V = 3V OH OL CC PCI bus levels guaranteed at 24mA Description Balanced propagation delays: t t The 74LCX32 is a low voltage CMOS quad 2- PLH PHL input OR gate fabricated with sub-micron silicon Operating voltage range: 2 gate and double-layer metal wiring C MOS V (Opr) = 2.0V to 3.6V CC technology. It is ideal for low power and high Pin and function compatible with speed 3.3V applications it can be interfaced to 74 series 32 5V signal environment for inputs. Latch-up performance exceeds It has same speed performance at 3.3V than 5V 500mA (JESD 17) AC/ACT family, combined with a lower power ESD performance: consumption. HBM > 2000V All inputs and outputs are equipped with (MIL STD 883 method 3015) MM > 200V protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. Order codes Part number Package Packaging 74LCX32MTR SO-14 Tape and reel 74LCX32TTR TSSOP14 Tape and reel July 2006 Rev 7 1/15 www.st.com 15Contents 74LCX32 Contents 1 Logic symbols and I/O equivalent circuit 3 2 Pin settings 4 2.1 Pin connection 4 2.2 Pin description 4 2.3 Truth table 4 3 Maximum rating . 5 3.1 Recommended operating conditions . 5 4 Electrical characteristics . 6 5 Test circuit . 8 6 Waveforms . 8 7 Package mechanical data . 9 8 Revision history . 14 2/15