Product Information

Si53301-B-GMR

Si53301-B-GMR electronic component of Silicon Labs

Datasheet
Clock Buffer 1:6 Universal buffer/level translator (725MHz), 2:1 input mux w/glitchless switching, sync. output enable (QFN32)

Manufacturer: Silicon Labs
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (AUD)

1: AUD 8.7754 ( AUD 9.65 Inc GST) ea
Line Total: AUD 8.7754 ( AUD 9.65 Inc GST)

33305 - Global Stock
Ships to you between
Wed. 17 Jul to Fri. 19 Jul
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
33305 - Global Stock


Ships to you between Wed. 17 Jul to Fri. 19 Jul

MOQ : 1
Multiples : 1

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Si53301-B-GMR
Silicon Labs

1 : AUD 8.7754
10 : AUD 7.9792
100 : AUD 6.7231
250 : AUD 6.3692
500 : AUD 5.8208
1000 : AUD 5.0423
2000 : AUD 5.0069
5000 : AUD 4.9538
10000 : AUD 4.7946

     
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Si5330x Data Sheet Ultra-Low Additive Jitter Fanout Clock Buffers with up to 10 KEY FEATURES Universal Outputs from Any-Format Input and Wide Frequency Range from 1 MHz to 725 MHz Ultra-low additive jitter: 50 fs rms Built-in LDOs for high PSRR performance The Si5330x family of Universal/Any-format fanout buffers is ideal for clock distribution Up to 10 outputs (1 MHz minimum) and redundant clocking applications. These devices feature typical Any-format Inputs (LVPECL, Low-power ultra-low jitter characteristics of 50 fs and operate over a wide frequency range. Built-in LVPECL, LVDS, CML, HCSL, LVCMOS) LDOs deliver high PSRR performance and reduce the need for external components, Wide frequency range simplifying low-jitter clock distribution in noisy environments. Output Enable option The Si5330x family is available in multiple configurations, with some versions offering Multiple configuration options a selectable input clock using a 2:1 input mux. Other features include independent Dual Bank option (synchronous) output enable, glitchless switching, LOS monitor of input clocks, output 2:1 Input Mux operation clock division, and built-in format translation. These buffers can be paired with the Synchronous output enable Si534x clocks and jitter attenuators, the Si5332 clocks, and the Si5xx oscillators to deliver end-to-end clock tree performance. Loss of signal (LOS) monitors for loss of input clock Output clock division: /1, /2, /4 RoHS compliant, Pb-free Temperature range: 40 to +85 C Skyworks Solutions, Inc. Phone 781 376-3000 Fax 781 376-3100 sales skyworksinc.com www.skyworksinc.com 1 Rev. 1.0 Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice November 5, 2021 1Si5330x Data Sheet Ordering Guide 1. Ordering Guide Table 1.1. Product Family Overview Part Description Input Input Output Glitch- LOS OE Synchro- Clk Divid- 1 Number MUX less Output Option er Option nous OE 1 Switch Si53301-B-GM 6 output universal buffer Yes 2 6 Diff / 12 Yes Yes Per Bank Yes Per Bank with 2:1 input mux SE Si53302-B-GM 10 output universal buffer Yes 2 10 Diff / 20 Yes Yes Per Bank Yes Per Bank with 2:1 input mux SE Si53303-B-GM Dual 1:5 universal buffer No 2 5 Diff / 10 No No Per Bank Yes Per Bank SE Si53304-B-GM 6 output universal buffer Yes 2 6 Diff / 12 Yes No Individual Yes No with 2:1 input mux SE Si53305-B-GM 10 output universal buffer Yes 2 10 Diff / 20 Yes No Individual Yes No with 2:1 input mux SE Si53306-B-GM 4 output universal buffer, No 1 4 Diff / 8 SE No No Single Yes No single input Si53307-B-GM 2 output universal buffer Yes 2 2 Diff / 4 SE Yes No Single Yes No with 2:1 input mux Si53308-B-GM Dual 1:3 universal buffer No 2 3 Diff / 6 SE No Yes Per Bank Yes Per Bank Note: 1. The synchronous features (Glitch-less switching and Synchronous OE) of the Si533xx family require a minimum input clock frequency of 1 MHz. If the selected input clock stops, pauses, or is gapped such that the 1 MHz minimum is not met for any time interval, then the output clock(s) will be disabled (turned off). Once the paused input clock restarts, the output clock may NOT start up immediately. Output start-up (turning back on) may be delayed for several input clock cycles until the internal synchronizer determines the input clock is once again valid. 2. Click on the part number above to see a block diagram for each corresponding part number. Table 1.2. Si5330x Ordering Guide Part Number Package Pb-Free, ROHS-6 Temperature 1 32-QFN Yes 40 to 85 C Si53301-B-GM 1 44-QFN Yes 40 to 85 C Si53302-B-GM 1 44-QFN Yes 40 to 85 C Si53303-B-GM 1 32-QFN Yes 40 to 85 C Si53304-B-GM 1 44-QFN Yes 40 to 85 C Si53305-B-GM 1 16-QFN Yes 40 to 85 C Si53306-B-GM 1 16-QFN Yes 40 to 85 C Si53307-B-GM 1 32-QFN Yes 40 to 85 C Si53308-B-GM Si53301/4-EVB Evaluation Board Note: 1. Add an at the end of the OPN to denote tape and reel ordering options. Skyworks Solutions, Inc. Phone 781 376-3000 Fax 781 376-3100 sales skyworksinc.com www.skyworksinc.com 2 Rev. 1.0 Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice November 5, 2021 2

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

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