Product Information

SI4133-D-GM

SI4133-D-GM electronic component of Silicon Labs

Datasheet
Phase Locked Loops - PLL RF synthesizer with RF1/RF2/IF output

Manufacturer: Silicon Labs
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (AUD)

1: AUD 14.8792 ( AUD 16.37 Inc GST) ea
Line Total: AUD 14.8792 ( AUD 16.37 Inc GST)

2813 - Global Stock
Ships to you between
Thu. 18 Jul to Mon. 22 Jul
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
2813 - Global Stock


Ships to you between Thu. 18 Jul to Mon. 22 Jul

MOQ : 1
Multiples : 1

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SI4133-D-GM
Silicon Labs

1 : AUD 14.8792
10 : AUD 14.0477
25 : AUD 12.9154
100 : AUD 12.6323
250 : AUD 11.8008
490 : AUD 11.6769
980 : AUD 11.6769
2940 : AUD 11.6769
5390 : AUD 11.5885

     
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Notes:- Show Stocked Products With Similar Attributes.

Si4133 Si4123/22/13/12 DUAL-BAND RF SYNTHESIZER WITH INTEGRATED VCOS FOR WIRELESS COMMUNICATIONS FEATURES Dual-band RF synthesizers Low phase noise RF1: 900 MHz to 1.8 GHz Programmable powerdown modes RF2: 750 MHz to 1.5 GHz 1 A standby current IF synthesizer 18 mA typical supply current IF: 62.5 to 1000 MHz 2.7 to 3.6 V operation Integrated VCOs, loop filters, Packages: 24-pin TSSOP, varactors, and resonators 28-lead QFN Ordering Information: Lead-free and RoHS compliant Minimal (2) number of external See page 31. components required Applications Pin Assignments Dual-band communications Digital cellular telephones GSM 850, E-GSM 900, DCS 1800, Si4133-GT PCS 1900 SCLK124 SEN Digital cordless phones SDATA223 VDDI Analog cordless phones Wireless local loop GNDR322 IFOUT RFLD421 GNDI Description RFLC520 IFLB GNDR619 IFLA The Si4133 is a monolithic integrated circuit that performs both IF and dual- 718 RFLB GNDD band RF synthesis for wireless communications applications. The Si4133 817 RFLA VDDD includes three VCOs, loop filters, reference and VCO dividers, and phase GNDR916 GNDD detectors. Divider and powerdown settings are programmable with a three- GNDR 10 15 XIN wire serial interface. RFOUT 11 14 PWDN Functional Block Diagram VDDR 12 13 AUXOUT Si4133-GM Reference XIN RFLA R Phase Amplifier Detector RFLB RF1 Powerdown PWDN Control 28 27 26 25 24 23 22 N RFOUT GNDR 1 21 GNDI SDATA R RFLC Serial Phase RFLD 2 20 IFLB Interface Detector SCLK RFLD RFLC 3 19 IFLA RF2 22-bit GND SEN Data GNDR 4 18 GNDD N Register Pad RFLB 5 17 VDDD R RFLA 6 16 GNDD Test Phase AUXOUT IFDIV IFOUT Mux Detector GNDR 7 15 XIN IF 8 9 10 11 12 13 14 IFLA N IFLB Patents pending Rev. 1.61 1/10 Copyright 2010 by Silicon Laboratories Si4133 GNDR GNDR GNDR SDATA RFOUT SCLK VDDR SEN AUXOUT VDDI PWDN IFOUT GNDD GNDISi4133 2 Rev. 1.61

Tariff Desc

8542.31.00 51 No ..Application Specific (Digital) Integrated Circuits (ASIC)

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