C8051F360-TB

C8051F360/1/2/3/4/5/6/7/8/9 Mixed Signal ISP Flash MCU Family Analog Peripherals Memory - 10-Bit ADC (F360/1/2/6/7/8/9 only) - 1280 bytes internal data RAM (256 + 1024) Up to 200 ksps - 32 kB (F360/1/2/3/4/5/6/7) or 16 kB (F368/9) Flash Up to 21 external single-ended or differential inputs In-system programmable in 1024-byte Sectors VREF from internal VREF, external pin or V DD 1024 bytes are reserved in the 32 kB devices Internal or external start of conversion source Digital Peripherals Built-in temperature sensor - up to 39 Port I/O All 5 V tolerant with high sink cur- - 10-Bit Current Output DAC (F360/1/2/6/7/8/9 only) rent - Two Comparators - Hardware enhanced UART, SMBus, and Programmable hysteresis and response time enhanced SPI serial ports Configurable as interrupt or reset source - Four general purpose 16-bit counter/timers Low current (0.4 A) - 16-Bit programmable counter array (PCA) with six - Brown-out detector and POR Circuitry capture/compare modules On-Chip Debug - Real time clock mode using PCA or timer and exter- - On-chip debug circuitry facilitates full speed, non- nal clock source intrusive in-system debug (no emulator required) - External Memory Interface (EMIF) - Provides breakpoints, single stepping, Clock Sources inspect/modify memory and registers - Two internal oscillators: - Superior performance to emulation systems using 24.5 MHz with 2% accuracy supports crystal-less ICE-chips, target pods, and sockets UART operation - Low cost, complete development kit 80/40/20/10 kHz low frequency, low power Supply Voltage - Flexible PLL technology - Range: 2.73.6 V (50 MIPS) 3.03.6 V (100 MIPS) - External oscillator: Crystal, RC, C, or clock - Power saving suspend and shutdown modes (1 or 2 pin modes) High Speed 8051 C Core - Can switch between clock sources on-the-fly useful - Pipelined instruction architecture executes 70% of in power saving modes instructions in 1 or 2 system clocks Packages - 100 MIPS or 50 MIPS throughput with on-chip PLL - 48-pin TQFP (C8051F360/3) - Expanded interrupt handler - 32-pin LQFP (C8051F361/4/6/8) - 2-cycle 16 x 16 MAC engine - 28-pin QFN (C8051F362/5/7/9) Temperature Range: 40 to +85 C ANALOG DIGITAL I/O PERIPHERALS UART Port 0 + SMBus + VOLTAGE COMPARATORS SPI - Port 1 - PCA Timer 0 Port 2 A 10-bit Timer 1 TEMP M 200 ksps SENSOR Timer 2 Port 3 U ADC X Timer 3 Port 3 10-bit Current F360/1/2/6/7/8/9 only Port 4 DAC 48-pin only HIGH-SPEED CONTROLLER CORE 16 x 16 8051 CPU 1024 B WDT POR MAC (100 or 50 MIPS) SRAM FLEXIBLE DEBUG Internal Oscillator/ 32/16 kB INTERRUPTS CIRCUITRY LFO/PLL ISP FLASH Rev. 1.1 5/15 Copyright 2015 by Silicon Laboratories C8051F36x CROSSBAR External Memory InterfaceC8051F360/1/2/3/4/5/6/7/8/9 2 Rev. 1.1