SLG46537V-DIP

SLG46537 GreenPAK Programmable Mixed-signal Matrix with Asynchronous State Machine Features Available Package Options Logic & Mixed Signal Circuits 2 mm Highly Versatile Macrocells Read Back Protection (Read Lock) 1.8 V (5%) to 5 V (10%) Supply 2 mm Operating Temperature Range: -40C to 85C RoHS Compliant / Halogen-Free 20-pin STQFN: 2 x 3 x 0.55 mm, 0.4 mm pitch or 22-pin MSTQFN: 2 x 2.2 x 0.55 mm, 0.4 mm pitch Applications Personal Computers and Servers PC Peripherals Consumer Electronics STQFN-20 MSTQFN-22 Data Communications Equipment (Top View) (Top View) Handheld and Portable Electronics Packages drawn to scale Block Diagram IO17 IO15 IO16 IO14 VDD Combination Function Macrocells Additional Logic ACMP0 Functions IO13 IO0 2-bit 2-bit 2-bit LUT2 0 LUT2 1 LUT2 2 FILTER 1 FILTER 0 or DFF0 or DFF1 or DFF2 with with Edge Edge Detect Detect 2-bit 3bit 3-bit IO12 LUT2 3 LUT3 0 LUT3 1 IO1 ACMP1 or PGEN or DFF3 or DFF4 3-bit 3-bit 3-bit LUT3 2 Programmable LUT3 3 LUT3 4 POR or DFF5 Delay or DFF6 or DFF7 IO11 IO2 ACMP2 3-bit 3-bit 3-bit LUT3 5 or LUT3 6 or LUT3 7 or Vref CNT/DLY2 CNT/DLY3 CNT/DLY4 ASM 8 states IO10 IO3 3-bit 3-bit 4-bit 25M Oscillator LUT3 8 or LUT3 9 or LUT4 0 or CNT/DLY5 CNT/DLY6 CNT/DLY0 ACMP 3 2 I C Serial Communication RC Oscillator 4-bit 3-bit IO9 LUT4 1 or LUT3 10 or IO4 CNT/DLY1 Pipe Delay Temperature 8 Byte RAM + Crystal Sensor OTP Memory Oscillator GND IO5 IO6 IO7 IO8 2020 Dialog Semiconductor Revision 1.15 Revised August 18, 2020 3 mm 2.2 mmSLG46537 1.0 Overview The SLG46537 provides a small, low power component for commonly used mixed-signal functions. The user creates their circuit design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the IO Pins and the mac- rocells of the SLG46537. This highly versatile device allows a wide variety of mixed-signal functions to be designed within a very small, low power single integrated circuit. The macrocells in the device include the following: Four Analog Comparators (ACMP) Two Voltage References (Vref) Nineteen Combination Function Macrocells Three Selectable DFF/Latch or 2-bit LUTs One Selectable Continuous DFF/Latch or 3-bit LUT Four Selectable DFF/Latch or 3-bit LUTs One Selectable Pipe Delay or 3-bit LUT One Selectable Programmable Pattern Generator or 2-bit LUT Five 8-bit delays/counters or 3-bit LUTs Two 16-bit delays/counters or 4-bit LUTs Two Deglitch Filters with Edge Detectors Asynchronous State Machine Eight States Flexible input logic from state transitions Serial Communications 2 I C Protocol compliant Pipe Delay 16 stage/3 output (Part of Combination Function Macrocell) Programmable Delay Two Oscillators (OSC) Configurable 25 kHz/2 MHz 25 MHz RC Oscillator Crystal Oscillator Power-On-Reset (POR) Eight Byte RAM + OTP User Memory 2 RAM Memory space that is readable and writable via I C User defined initial values transferred from OTP Analog Temperature Sensor 2020 Dialog Semiconductor Revision 1.15 Page 1 of 194