DATASHEET HDTV CLOCK SYNTHESIZER MK2716 Description Features The MK2716 is a low-cost, low jitter, high-performance PLL Packaged in 8-pin SOIC clock synthesizer designed to produce the 74.176 MHz and Pb (lead) free package 74.25 MHz clocks necessary for HDTV systems. Using Input frequency of 27 MHz IDTs patented analog Phase-Locked Loop (PLL) techniques, the device accepts a 27 MHz crystal or clock Zero ppm synthesis error in output clock input. The zero ppm synthesis error exactly locks the 3.3 V or 5 V 10% operating supply display to the digital stream. Ideal for HDTV applications and oscillator manufacturers IDT manufactures the largest variety multimedia clock 25 mA output drive capability at TTL levels synthesizers for all applications. Consult IDT to eliminate Advanced, low power, sub-micron CMOS process crystals and oscillators from your board. Operating voltage of 3.3 V or 5 V For applications that require lower jitter, such as SDI and pixel clocks, use the ICS664. Block Diagram VDD Clock SEL Synthesis CLK and Control 74.17582418 MHz or Circuitry 74.2500 MHz X1 27 MHz Clock crystal or 27.0000 MHz Buffer clock input X2 2 GND IDT HDTV CLOCK SYNTHESIZER 1 MK2716 REV G 051310MK2716 HDTV CLOCK SYNTHESIZER CLOCK SYNTHESIZER Pin Assignment FREQUENCY SELECT TABLE SEL CLK (MHz) ICLK/X1 8 1 X2 0 74.17582418 VDD 2 7 27M 1 74.25 GND 3 6 SEL CLK 5 4 GND Pin Descriptions Pin Pin Pin Pin Description Number Name Type 1 ICLK/X1 XI Crystal connection. Connect to a 27 MHz fundamental crystal or clock. 2 VDD Power Connect to +3.3 V or +5 V. 3 GND Power Connect to ground. 4 27M Output 74.17582418 MHZ or 74.25 MHz clock output (see table above). 5 GND Power Connect to ground. 6 SEL Input Select pin determines value of CLK per table above. 7 27M Output 27 MHz buffered clock or crystal oscillator output. 8 X2 XO Crystal connection. Connect to a 27 MHz crystal, or leave unconnected for clock input. External Components Decoupling Capacitor should be used. The device crystal connections should include pads for small capacitors from X1 to ground and As with any high performance mixed-signal IC, the MK2716 from X2 to ground. These capacitors are used to adjust the must be isolated from system power supply noise to perform stray capacitance of the board to match the nominally optimally. required crystal load capacitance. Because load capacitance can only be increased in this trimming process, A decoupling capacitor of 0.01F must be connected it is important to keep stray capacitance to a minimum by between VDD and GND on pins 2 and 3. It must be using very short PCB traces (and no vias) between the connected close to the MK2716 to minimize lead crystal and device. Crystal capacitors, if needed, must be inductance. Pin 5 can be connected to pin 3. No external connected from each of the pins X1 and X2 to ground. power supply filtering is required for the MK2716. The value (in pF) of these crystal caps should equal (C -16 L Series Termination Resistor pF)*2. In this equation, C = crystal load capacitance in pF. L A 33 terminating resistor can be used next to the clock Example: For a crystal with an 18 pF load capacitance, each outputs for trace lengths over one inch. crystal capacitor would be 4 pF (18-16) x 2 = 4. Crystal Load Capacitors The total on-chip capacitance is approximately 18 pF. A parallel resonant, fundamental mode, AT cut 27 MHz crystal IDT HDTV CLOCK SYNTHESIZER 2 MK2716 REV G 051310