MC74AC139, MC74ACT139 Dual 1-of-4 Decoder/Demultiplexer The MC74AC139/74ACT139 is a highspeed, dual 1of4 decoder/demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutuallyexclusive www.onsemi.com activeLOW outputs. Each decoder has an activeLOW Enable input which can be used as a data input for a 4output demultiplexer. Each MARKING half of the MC74AC139/74ACT139 can be used as a function DIAGRAMS generator providing four minterms of two variables. 16 Features SOIC16 xxx139G D SUFFIX 16 Multifunctional Capability AWLYWW CASE 751B 1 Two Completely Independent 1of4 Decoders 1 Active LOW Mutually Exclusive Outputs 16 Outputs Source/Sink 24 mA xxx TSSOP16 ACT139 Has TTL Compatible Inputs 139 16 DT SUFFIX ALYW These are PbFree Devices CASE 948F 1 1 V E A A O O O O CC b 0b 1b 0b 1b 2b 3b xxx = AC or ACT 16 15 14 13 12 11 10 9 A = Assembly Location WL or L = Wafer Lot Y = Year WW or W = Work Week G or = PbFree Package (Note: Microdot may be in either location) 1 2 3 4 567 8 E A A O O O O GND a 0a 1a 0a 1a 2a 3a ORDERING INFORMATION Figure 1. Pinout: 16Lead Packages Conductors See detailed ordering and shipping information in the package (Top View) dimensions section on page 6 of this data sheet. PIN ASSIGNMENT PIN FUNCTION A , A Address Inputs 0 1 E Enable Inputs O O Outputs 0 3 TRUTH TABLE Inputs Outputs E A A O O O O 0 1 0 1 2 3 H X X H H H H L L L L H H H L H L H L H H L L H H H L H L H H H H H L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: January, 2015 Rev. 8 MC74AC139/DMC74AC139, MC74ACT139 EA A 0 1 DECODER a O O O O 0 1 2 3 E A A 0 1 DECODER b O O O O 0 1 2 3 Figure 2. Logic Symbol E A A E A A a 0a 1a b 0b 1b 0 0 0 0 0 0 0 0 0a 1a 2a 3a 0b 1b 2b 3b NOTE: This diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Figure 3. Logic Diagram E E FUNCTIONAL DESCRIPTION A A 0 O 0 O 0 0 The MC74AC139/74ACT139 is a highspeed dual A A 1 1 1of4 decoder/demultiplexer. The device has two E E independent decoders, each of which accepts two binary A A 0 O 0 O 1 1 weighted inputs (A A ) and provides four mutually 0 1 A A 1 1 exclusive activeLOW outputs (O O ). Each decoder has 0 3 E E an activeLOW enable (E). When E is HIGH all outputs are A 0 O A O 2 0 2 forced HIGH. The enable can be used as the data input for A A 1 1 a 4output demultiplexer application. Each half of the E E MC74AC139/74ACT139 generates all four minterms of O O A 3 A 3 0 0 two variables. These four minterms are useful in some A A 1 1 applications, replacing multiple gate functions as shown in Figure 4, and thereby reducing the number of packages Figure 4. Gate Functions (Each Half) required in a logic network. www.onsemi.com 2