MC100EP196BFAR2G

MC100EP196B 3.3 V ECL Programmable Delay Chip With FTUNE Descriptions The MC100EP196B is a Programmable Delay Chip (PDC) designed primarily for clock deskewing and timing adjustment. It provides variable EN D1 CASCADE D2 CASCADE D3 V CC V EE SETMAX D4 SETMIN D5 LEN D6 V EE D7 MC100EP196B 32 31 30 29 28 27 26 25 24 1 D8 V EE 23 D9 2 D0 22 D10 3 V CC 21 4 IN Q MC100EP196B 20 5 IN Q 6 19 V BB V CC 7 18 V V EF CC 17 8 V FTUNE CF 9 10 11 12 13 14 15 16 Warning: All V and V pins must be externally connected CC EE to Power Supply to guarantee proper operation. Figure 1. 32Lead LQFP (Top View) 32 31 30 29 28 27 26 25 1 24 V D8 EE 2 23 D0 D9 3 22 V CC D10 4 21 Q IN MC100EP196B 5 20 Q IN V CC V 6 19 BB V CC V 7 18 EF 8 17 V FTUNE CF 9 10 11 12 1314 1516 Exposed Pad (EP) Figure 2. 32Lead QFN (Top View)