PTN38003A Multi-protocol USB3.2 and DisplayPort linear redriver Rev. 2.1 8 December 2021 Product data sheet 1 General description PTN38003A is a high-performance USB3.2/DisplayPort multi-protocol linear redriver that is optimized for USB3.2 and DisplayPort applications on either the downstream facing port (DFP) or upstream facing port (UFP) application. PTN38003A addresses high-speed signal quality enhancement requirements for implementation of USB Type-C interface in a platform that supports the USB Type-C, VESA DisplayPort Alternate Mode standards. This device also implements the snooping monitor of the sideband signals from DP mode (AUX) to optimize the configuration, power saving mode and performance. The device provides programmable linear equalization, output swing linearity control by 2 pin strapping or I C control to improve signal integrity and enable channel extension by reducing inter-symbol interference (ISI). DisplayPort AUX snooping is performed to follow relevant DisplayPort source-sink AUX transactions and configure the redriver to meet link requirements. For USB operation, PTN38003A has built-in advanced power management capability that enables significant power saving under USB3.2 low power modes (U2/U3). It detects LFPS (Low Frequency Periodic Signaling)/LBPM (LFPS Based PWM Message) signaling to configure the operation (USB3.2 Gen 1/Gen 2 & x1/x2) and link electrical conditions and it activates/deactivates internal circuitry and logic dynamically. The device performs these actions without host software intervention and conserves power. The host processor keeps PTN38003A in deep power saving or USB mode until Alternate Mode has been entered. The device is tailored to support USB3.2 electrical idle, receiver detection and power saving modes. It maintains two separate input signal detectors loss of high-speed signal (LOS) and USB LFPS detectors with built-in hysteresis. For DisplayPort (DP) operation, PTN38003A monitors the AUX transactions and adjusts the DisplayPort channel setting during DP Link initialization and training. PTN38003A is powered from a 1.8 V supply. It is available in a small high performance HWFLGA36 package.NXP Semiconductors PTN38003A Multi-protocol USB3.2 and DisplayPort linear redriver 2 Features and benefits Flexible multi-protocol linear redriver supports three signaling combinations specified in USB Type-C and VESA specifications Mode 0: Deep Power saving Mode 1: USB3.2 Gen1x1/Gen1x2/Gen2x1/Gen2x2 Mode 2: USB3.2 + DP 2-Lane + AUX snooping Mode 3: DP 4-Lane + AUX snooping Supports USB 3.2 Gen1x1, Gen 1x2, Gen2x1, Gen2x2 (5 Gbps and 10 Gbps) 2 I C register based Flat gain control Peaking gain of +12.1 dB at 5 GHz Output linearity control: 500 mVppd to 950 mVppd Support DP2.0 link rates at 1.62 Gbps (RBR), 2.7 Gbps (HBR), 5.4 Gbps (HBR2), 8.1 Gbps (HBR3),10 Gbps (UHBR10), 13.5 Gbps (UHBR13.5), 20 Gbps (UHBR20) DP AUX monitoring during DP link training to control DP channel 2 I C register based Flat gain control Peaking gain of 10.2 dB at 4.05 GHz, 20 dB at 10 GHz Output linearity control: 500 mVppd to 950 mVppd Compliant to DisplayPort, USB3.2 standard and USB Type-C Alternate Mode interoperability testing Implements USB Type-C Safe state conditions on all connector facing pins 2 Configurable via I C interface with a configurable address pin Integrated termination resistors provide impedance matching on both transmit and receive sides Supports maximum voltage limit (V ) to align to the latest USB3 specification voltage jump and computing platform capabilities Autonomous Orientation detection of USB Type-C device connection RX equalizers on all high-speed inputs to compensate for signal attenuation Automatic receiver termination detection in USB mode Good linearity over the frequency band (50 MHz to 10.3 GHz) and voltage dynamic range Excellent Differential return loss performance: < -16 dB up to 10.3 GHz Flow-through pin-out to ease PCB layout and minimize crosstalk effects Very low crosstalk: DDNEXT < -50 dB up to 10.3 GHz Low active current consumption for output swing linearity control of 950 mVppd USB3.2 Gen2x2 or Gen1x2 (Mode 1) active power: 250 mA (typ) USB3.2 Gen2x1 or Gen1x1 (Mode 1) active power: 125 mA (typ) 1-lane DP HBR3/UHBR10/UHBR13.5/UHBR20 (Mode 2 or 3): 62 mA (typ) 2-lane DP HBR3/UHBR10/UHBR13.5/UHBR20 (Mode 2 or 3): 125 mA (typ) 4-lane DP only HBR3/UHBR10/UHBR13.5/UHBR20 (Mode 3): 250 mA (typ) Powersaving states: USB3.2 (Mode 1) 0.22 mA (typ) when 2 lanes are enabled in USB3 U2/U3 states 0.11 mA (typ) when 1 lane is enabled in USB3 U2/U3 states 0.11 mA (typ) only Rx detection is enabled on 1 lane when no connection detected (USB Rx detection enabled) DisplayPort sleep D3 mode (Mode 3): 3.2 mA (typ) 10 A (typ) when in deep power saving state PTN38003A All information provided in this document is subject to legal disclaimers. NXP B.V. 2021. All rights reserved. Product data sheet Rev. 2.1 8 December 2021 2 / 55