Product Information

PCA9614DPZ

PCA9614DPZ electronic component of NXP

Datasheet
Interface - Signal Buffers, Repeaters PCA9614DP

Manufacturer: NXP
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Price (AUD)

1: AUD 5.5731 ( AUD 6.13 Inc GST) ea
Line Total: AUD 5.5731 ( AUD 6.13 Inc GST)

9649 - Global Stock
Ships to you between
Thu. 18 Jul to Mon. 22 Jul
MOQ: 1  Multiples: 1
Pack Size: 1
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1 - Global Stock


Ships to you between
Fri. 19 Jul to Wed. 24 Jul

MOQ : 1
Multiples : 1
1 : AUD 6.6788

9649 - Global Stock


Ships to you between Thu. 18 Jul to Mon. 22 Jul

MOQ : 1
Multiples : 1
1 : AUD 5.5731
10 : AUD 4.7946
100 : AUD 4.2638
250 : AUD 4.0515
500 : AUD 3.6977
1000 : AUD 3.2023
2500 : AUD 3.1669
5000 : AUD 3.1315
10000 : AUD 3.0785

     
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PCA9614 2 2-channel multipoint Fast-mode Plus differential I C-bus buffer Rev. 2 21 September 2021 Product data sheet 1 General description 2 The PCA9614 is a Fast-mode Plus (Fm+) SMBus/I C-bus buffer that extends the normal 2 single-ended SMBus/I C-bus through electrically noisy environments using a differential 2 2 2 SMBus/I C-bus (dI C) physical layer, which is transparent to the SMBus/I C-bus protocol layer. It consists of two single-ended to differential driver channels for the SCL (serial clock), SDA (serial data). 2 The use of differential transmission lines between identical dI C bus buffers removes electrical noise and common-mode offsets that are present when signal lines must pass between different voltage domains, are bundled with hostile signals, or run adjacent to electrical noise sources, such as high energy power supplies and electric motors. 2 The SMBus/I C-bus was conceived as a simple slow speed digital link for short runs, typically on a single PCB or between adjacent PCBs with a common ground connection. Applications that extend the bus length or run long cables require careful design to preserve noise margin and reject interference. 2 The dI C-bus buffers were designed to solve these problems and are ideally suited for rugged high noise environments and/or longer cable applications, allow multiple targets, and operate at bus speeds up to 1 MHz clock rate. Cables can be extended to at least 2 three meters (3 m), or longer cable runs at lower clock speeds. The dI C-bus buffers are 2 compatible with existing SMBus/I C-bus devices and can drive Standard, Fast-mode, and Fast-mode Plus devices on the single-ended side. Signal direction is automatic and requires no external control. To prevent bus latch-up 2 the I C-bus side employs static level offset. Take care when connecting the PCA9614 to 2 other SMBus/I C-bus buffers that do not operate with other static level offset bus buffers. These devices are a bridge between the normal 2-wire single-ended wired-OR SMBus/ 2 2 I C-bus and the 4-wire dI C-bus. The PCA9614 has two supply voltages, V and V . V , the card side supply, DD(A) DD(B) DD(A) only serves as a reference and ranges from 2.3 V to 5.5 V. V , the line side supply, DD(B) serves as the majority supply for circuitry, and ranges from 3.0 V to 5.5 V.NXP Semiconductors PCA9614 2 2-channel multipoint Fast-mode Plus differential I C-bus buffer 2 dI C-bus 2 (differential I C-bus, single-ended single-ended 1 of 2 lines shown) 2 2 V V V V V V I C-bus DD(A)1 DD(B) DD(B) DD(A)2 I C-bus DD(B) DD(B) SCL SCL PCA9614 PCA9614 SDA SDA twisted-pair cable EN EN GND1 GND2 aaa-011060 2 2 2 Figure 1.SMBus/I C-bus translation to dI C-bus and back to SMBus/I C-bus 2 Features and benefits New dI2C-bus buffers offer improved resistance to system noise and ground offset up 1 to of supply voltage 2 2 2 2 channel dI C (differential I C) to Fm+ single-ended buffer operating up to 1 MHz with 30 mA SDA/SCL drive capability 2 Compatible with I C-bus Standard/Fast-mode and SMBus, Fast-mode Plus up to 1 MHz Active HIGH (internal pull-up resistor) Enable disables devices to high-impedance state 2 Single-ended I C-bus on card side up to 540 pF 2 Differential I C-bus on cable side supporting multi-drop bus Maximum cable length: 3 m (approximately 10 feet) (longer at lower frequency) 2 dI C output: 1.5 V differential output with nominal terminals Differential line impedance (user defined): 100 nominal suggested Receive input sensitivity: 200 mV Hysteresis: 30 mV typical Input impedance: high-impedance (1 M typical) Receive input voltage range: -0.5 V to +5.5 V Lock-up free operation 2 Supports arbitration and clock stretching across the dI C-bus buffers 2 Powered-off and powering-up high-impedance I C-bus pins Operating supply voltage (V ) range of 2.3 V to 5.5 V with single-ended side 5.5 V DD(A) tolerant 2 Differential I C-bus operating supply voltage (V ) range of 3.0 V to 5.5 V with 5.5 V DD(B) tolerant. Best operation is at 5 V. ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101 Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA Package offering: TSSOP10 PCA9614 All information provided in this document is subject to legal disclaimers. NXP B.V. 2021. All rights reserved. Product data sheet Rev. 2 21 September 2021 2 / 28

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
FR9
Freescale
FREESCALE SEMI
Freescale Semicon
FREESCALE SEMICONDUC
Freescale Semiconductor
Freescale Semiconductor - NXP
NXP
NXP Freescale
NXP (FREESCALE)
NXP / Freescale
NXP SEMI
NXP Semicon
NXP SEMICONDUCTOR
NXP Semiconductors
NXP USA Inc.
PH3
PHI

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