Product Information

PCA9509GM,125

PCA9509GM,125 electronic component of NXP

Datasheet
Interface - Signal Buffers, Repeaters I2C LV LEVEL TRANSL

Manufacturer: NXP
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (AUD)

1: AUD 1.5994 ( AUD 1.76 Inc GST) ea
Line Total: AUD 1.5994 ( AUD 1.76 Inc GST)

23387 - Global Stock
Ships to you between
Wed. 17 Jul to Fri. 19 Jul
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
7 - Global Stock


Ships to you between
Thu. 18 Jul to Tue. 23 Jul

MOQ : 1
Multiples : 1
1 : AUD 2.2389

23387 - Global Stock


Ships to you between Wed. 17 Jul to Fri. 19 Jul

MOQ : 1
Multiples : 1
1 : AUD 1.5994
10 : AUD 1.3039
100 : AUD 1.0845
500 : AUD 0.9943
1000 : AUD 0.8315
2000 : AUD 0.8138
4000 : AUD 0.7749
8000 : AUD 0.7608

     
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PCA9509 2 Level translating I C-bus/SMBus repeater Rev. 7 4 November 2014 Product data sheet 1. General description 2 The PCA9509 is a level translating I C-bus/SMBus repeater that enables processor low 2 voltage 2-wire serial bus to interface with standard I C-bus or SMBus I/O. While retaining 2 all the operating modes and features of the I C-bus system during the level shifts, it also 2 permits extension of the I C-bus by providing bidirectional buffering for both the data 2 (SDA) and the clock (SCL) lines, thus enabling the I C-bus or SMBus maximum capacitance of 400 pF on the higher voltage side. Port A allows a voltage range from 1.35 V to V 1.0 V and requires no external pull-up resistors due to the internal CC(B) current source. Port B allows a voltage range from 3.0 V to 5.5 V and is overvoltage tolerant. Both port A and port B SDA and SCL pins are high-impedance when the PCA9509 is unpowered. For applications where Port A V is less than 1.35 V or Port B V is less than 3.0 V, CC(A) CC(B) use drop-in replacement PCA9509A. The bus port B drivers are compliant with SMBus I/O levels, while port A uses a current sensing mechanism to detect the input or output LOW signal which prevents bus lock-up. Port A uses a 1 mA current source for pull-up and a 200 pull-down driver. This results in a LOW on the port A accommodating smaller voltage swings. The output pull-down on the port A internal buffer LOW is set for approximately 0.2 V, while the input threshold of the internal buffer is set about 50 mV lower than that of the output voltage LOW. When the port A I/O is driven LOW internally, the LOW is not recognized as a LOW by the input. This prevents a lock-up condition from occurring. The output pull-down on the port B 2 drives a hard LOW and the input level is set at 0.3 of SMBus or I C-bus voltage level 2 which enables port B to connect to any other I C-bus devices or buffer. The PCA9509 drivers are not enabled unless V is above 0.8 V and V is above CC(A) CC(B) 2.5 V. The enable (EN) pin can also be used to turn on and turn off the drivers under system control. Caution should be observed to change only the state of the EN pin when the bus is idle. 2. Features and benefits Bidirectional buffer isolates capacitance and allows 400 pF on port B of the device Voltage level translation from port A (1.35 V to V 1.0 V) to port B (3.0 V to 5.5 V) CC(B) Requires no external pull-up resistors on lower voltage port A Active HIGH repeater enable input Open-drain inputs/outputs Lock-up free operation Supports arbitration and clock stretching across the repeater 2 Accommodates Standard-mode and Fast-mode I C-bus devices and multiple mastersPCA9509 NXP Semiconductors 2 Level translating I C-bus/SMBus repeater 2 Powered-off high-impedance I C-bus pins Operating supply voltage range of 1.35 V to V 1.0 V on port A, 3.0 V to 5.5 V on CC(B) port B 5 V tolerant port B SCL, SDA and enable pins 0 Hz to 400 kHz clock frequency Remark: The maximum system operating frequency may be less than 400 kHz because of the delays added by the repeater. ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101 Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA Packages offered: TSSOP8, SO8, XQFN8 3. Ordering information Table 1. Ordering information Type number Topside Package marking Name Description Version PCA9509D PCA9509 SO8 plastic small outline package 8 leads body width 3.9 mm SOT96-1 PCA9509DP 9509 TSSOP8 plastic thin shrink small outline package 8 leads body width 3 mm SOT505-1 1 PCA9509GM P9X XQFN8 plastic, extremely thin quad flat package no leads 8 terminals SOT902-2 body 1.6 1.6 0.5 mm 1 X changes based on date code. 3.1 Ordering options Table 2. Ordering options Type number Orderable Package Packing method Minimum Temperature part number order quantity PCA9509D PCA9509D,112 SO8 Standard marking *ICs tube 2000 T = 40 Cto+85 C amb - DSC bulk pack PCA9509D,118 SO8 Reel 13 Q1/T1 2500 T = 40 Cto+85 C amb *standard mark SMD = 40 Cto+85 C PCA9509DP PCA9509DP,118 TSSOP8 Reel 13 Q1/T1 2500 T amb *standard mark SMD PCA9509GM PCA9509GM,125 XQFN8 Reel 7 Q3/T4 4000 T = 40 Cto+85 C amb *standard mark PCA9509 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 7 4 November 2014 2 of 24

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
FR9
Freescale
FREESCALE SEMI
Freescale Semicon
FREESCALE SEMICONDUC
Freescale Semiconductor
Freescale Semiconductor - NXP
NXP
NXP Freescale
NXP (FREESCALE)
NXP / Freescale
NXP SEMI
NXP Semicon
NXP SEMICONDUCTOR
NXP Semiconductors
NXP USA Inc.
PH3
PHI

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