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MKT564B256BSB3M

MKT564B256BSB3M electronic component of NXP

Datasheet
Development Boards & Kits - Other Processors MKT564B256BSB3MHWONLYBOARDS NO MARK

Manufacturer: NXP
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1: AUD 1028.7173 ( AUD 1131.59 Inc GST) ea
Line Total: AUD 1028.7173 ( AUD 1131.59 Inc GST)

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MOQ: 1  Multiples: 1
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Ships to you between Thu. 18 Jul to Mon. 22 Jul

MOQ : 1
Multiples : 1
1 : AUD 946.4199

     
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Freescale Semiconductor Document Number: MPC5646C Rev.6, 02/2014 Data Sheet: Advance Information MPC5646C MAPBGA225 QFN12 208-pin LQFP 256 MAPBGA 15 mm x 15 mm mm x mm (28 mm x 28 mm) (17 mm x 17 mm) MPC5646C SOT-343R PKG-TBD mm x mm mm x mm 176-pin LQFP TBD Microcontroller Data Sheet (24 mm x 24 mm) On-chip modules available within the family e200z4d, e200z0h, or both. include the following features: Crossbar switch architecture for concurrent access to peripherals, flash memory, and e200z4d dual issue, 32-bit core Power SRAM from multiple bus masters Architecture compliant CPU 32 channel eDMA controller with Up to 120 MHz DMAMUX 4 KB, 2/4-Way Set Associative Timer supports input/output channels Instruction Cache providing 16-bit input capture, output Variable length encoding (VLE) compare, and PWM functions (eMIOS) Embedded floating-point (FPU) unit 2 analog-to-digital converters (ADC): one Supports Nexus3+ 10-bit and one 12-bit e200z0h single issue, 32-bit core Power Cross Trigger Unit (CTU) to enable Architecture compliant CPU synchronization of ADC conversions with a Up to 80 MHz timer event from the eMIOS or from the PIT Variable length encoding (VLE) Up to 8 serial peripheral interface (DSPI) modules Supports Nexus3+ Up to 10 serial communication interface Up to 3 MB on-chip flash memory: flash (LINFlex) modules page buffers to improve access time Up to 6 full CAN (FlexCAN) modules with Up to 256 KB on-chip SRAM 64 MBs each 64 KB on-chip data flash memory to CAN Sampler to catch ID of CAN message support EEPROM emulation 2 1 inter IC communication interface (I C) Up to 16 semaphores across all slave ports module User selectable MBIST Up to 177 (LQFP) or 199 (BGA) Low-power modes supported: STOP, configurable general purpose I/O pins HALT, STANDBY 1 System Timer Module (STM) with four 16 region Memory Protection Unit (MPU) 32-bit compare channels Dual-core Interrupt Controller (INTC). Up to 8 periodic interrupt timers (PIT) with Interrupt sources can be routed to 32-bit counter resolution This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. Freescale Semiconductor, Inc., 2009-2014. All rights reserved.Table of Contents Introduction 4 problems 66 1.1 Document Overview 4 4.11.2 Electromagnetic interference (EMI) . 67 1.2 Description .4 4.11.3 Absolute maximum ratings (electrical sensitivity)67 2 Block diagram 7 4.12 Fast external crystal oscillator (440 MHz) electrical 3 Package pinouts and signal descriptions 10 characteristics . 68 3.1 Pad types .13 4.13 Slow external crystal oscillator (32 kHz) electrical 3.2 System pins .14 characteristics . 71 3.3 Functional ports 14 4.14 FMPLL electrical characteristics . 73 4 Electrical Characteristics 41 4.15 Fast internal RC oscillator (16 MHz) electrical 4.1 Parameter classification 41 characteristics . 74 4.2 NVUSRO register .41 4.16 Slow internal RC oscillator (128 kHz) electrical 4.2.1 NVUSRO PAD3V5V(0) field description .42 characteristics . 75 4.2.2 NVUSRO PAD3V5V(1) field description .42 4.17 ADC electrical characteristics . 76 4.3 Absolute maximum ratings 42 4.17.1 Introduction . 76 4.4 Recommended operating conditions 44 4.18 Fast Ethernet Controller . 87 4.5 Thermal characteristics .47 4.18.1 MII Receive Signal Timing (RXD 3:0 , RX DV, 4.5.1 Package thermal characteristics 47 RX ER, and RX CLK) . 87 4.5.2 Power considerations .48 4.18.2 MII Transmit Signal Timing (TXD 3:0 , TX EN, 4.6 I/O pad electrical characteristics 48 TX ER, TX CLK) . 87 4.6.1 I/O pad types .48 4.18.3 MII Async Inputs Signal Timing (CRS and COL)88 4.6.2 I/O input DC characteristics 49 4.18.4 MII Serial Management Channel Timing (MDIO and 4.6.3 I/O output DC characteristics .50 MDC)89 4.6.4 Output pin transition times .52 4.19 On-chip peripherals . 91 4.6.5 I/O pad current specification .53 4.19.1 Current consumption 91 4.7 RESET electrical characteristics 55 4.19.2 DSPI characteristics . 93 4.8 Power management electrical characteristics 57 4.19.3 Nexus characteristics . 101 4.8.1 Voltage regulator electrical characteristics 57 4.19.4 JTAG characteristics 103 4.8.2 VDD BV options 59 5 Package characteristics 105 4.8.3 Voltage monitor electrical characteristics 60 5.1 Package mechanical data . 105 4.9 Low voltage domain power consumption .61 5.1.1 176 LQFP package mechanical drawing 105 4.10 Flash memory electrical characteristics 63 5.1.2 208 LQFP package mechanical drawing 108 4.10.1 Program/Erase characteristics 63 5.1.3 256 MAPBGA package mechanical drawing . 113 4.10.2 Flash memory power supply DC characteristics65 6 Ordering information 115 4.10.3 Flash memory start-up/switch-off timings .66 7 Revision history 116 4.11 Electromagnetic compatibility (EMC) characteristics 66 4.11.1 Designing hardened software to avoid noise MPC5646C Data Sheet, Rev.6 2 Freescale Semiconductor

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