INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT4316
Quad bilateral switches
September 1993
Product specication
File under Integrated Circuits, IC06Philips Semiconductors Product specication
Quad bilateral switches 74HC/HCT4316
FEATURES The 74HC/HCT4316 have four independent analog
switches. Each switch has two input/output terminals
Low ON resistance:
(nY, nZ) and an active HIGH select input (nS). When the
160 (typ.) at V - V = 4.5 V
CC EE enable input (E) is HIGH, all four analog switches are
120 (typ.) at V - V = 6.0 V
CC EE turned off.
80 (typ.) at V - V = 9.0 V
CC EE
Current through a switch will not cause additional V
CC
Logic level translation:
current provided the voltage at the terminals of the switch
to enable 5 V logic to communicate
is maintained within the supply voltage range;
with 5 V analog signals
V >> (V , V ) >> V . Inputs nY and nZ are electrically
CC Y Z EE
Typical break before make built in
equivalent terminals.
Output capability: non-standard
V and GND are the supply voltage pins for the digital
CC
control inputs (E and nS). The V to GND ranges are 2.0
I category: MSI
CC CC
to 10.0 V for HC and 4.5 to 5.5 V for HCT.
The analog inputs/outputs (nY and nZ) can swing between
GENERAL DESCRIPTION
V as a positive limit and V as a negative limit.
CC EE
V - V may not exceed 10.0 V.
The 74HC/HCT4316 are high-speed Si-gate CMOS CC EE
devices. They are specified in compliance with JEDEC
See the 4016 for the version without logic level
standard no. 7A.
translation.
QUICK REFERENCE DATA
V = GND = 0 V; T =25C; t =t = 6 ns
EE amb r f
TYPICAL
SYMBOL PARAMETER CONDITIONS UNIT
HC HCT
t turn ON time C = 15 pF; R =1 k;
PZH L L
V =5 V
CC
E to V 19 19 ns
OS
nS to V 16 17 ns
OS
t turn ON time
PZL
E to V 19 24 ns
OS
nS to V 16 21 ns
OS
t / t turn OFF time
PHZ PLZ
E to V 20 21 ns
OS
nS to V 16 19 ns
OS
C input capacitance 3.5 3.5 pF
I
C power dissipation capacitance per switch notes 1 and 2 13 14 pF
PD
C max. switch capacitance 5 5 pF
S
Notes
C = output load capacitance in pF
1. C is used to determine the dynamic power L
PD
dissipation (P in W):
D
C = max. switch capacitance in pF
S
2 2
P =C V f +{(C +C )V f }
D PD CC i L S CC o
V = supply voltage in V
CC
where:
2. For HC the condition is V = GND to V
I CC
f = input frequency in MHz
i
For HCT the condition is V = GND to V - 1.5 V
I CC
f = output frequency in MHz
o
2
{(C + C ) V f } = sum of outputs
L S CC o
September 1993 2