Product Information

74HC4353N

74HC4353N electronic component of NXP

Datasheet
Multiplexer Switch ICs TRIPLE 2-CHANNEL MUX/DEMUX/WL

Manufacturer: NXP
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Price (AUD)

1: AUD 1.5899 ( AUD 1.75 Inc GST) ea
Line Total: AUD 1.5899 ( AUD 1.75 Inc GST)

93 - Global Stock
Ships to you by
Mon. 08 Jul
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
93 - Global Stock


Ships to you by Mon. 08 Jul

MOQ : 1
Multiples : 1
1 : AUD 1.5899
25 : AUD 1.4385
50 : AUD 1.1357
75 : AUD 0.9842
100 : AUD 0.9464

     
Manufacturer
Product Category
Number of Channels
On Resistance - Max
On Time - Max
Off Time - Max
Propagation Delay Time
Operating Supply Voltage
Maximum Operating Temperature
Minimum Operating Temperature
Package / Case
Product
Configuration
Supply Voltage - Min
Supply Voltage - Max
Maximum Dual Supply Voltage
Mounting Style
Packaging
Bandwidth
Supply Type
Brand
Pd - Power Dissipation
Factory Pack Quantity :
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INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT4353 Triple 2-channel analog multiplexer/demultiplexer with latch December 1990 Product specication File under Integrated Circuits, IC06Philips Semiconductors Product specication Triple 2-channel analog 74HC/HCT4353 multiplexer/demultiplexer with latch FEATURES multiplexer has two independent inputs/outputs (nY and 0 nY ), a common input/output (nZ) and select inputs (S to 1 1 Wide analog input voltage range: 5 V S ). 3 Low ON resistance: Each multiplexer/demultiplexer contains two bidirectional 80 (typ.) at V - V = 4.5 V CC EE analog switches, each with one side connected to an 70 (typ.) at V - V = 6.0 V CC EE independent input/output (nY and nY ) and the other side 0 1 60 (typ.) at V - V = 9.0 V CC EE connected to a common input/output (nZ). Logic level translation: With E LOW and E HIGH, one of the two switches is to enable 5 V logic to communicate with 5 V analog 1 2 selected (low impedance ON-state) by S to S . 1 3 signals The data at the select inputs may be latched by using the Typical break before make built in active LOW latch enable input (LE). When LE is HIGH, the Address latches provided latch is transparent. When either of the two enable inputs, E (active LOW) and E (active HIGH), is inactive, all Output capability: non-standard 1 2 analog switches are turned off. I category: MSI CC V and GND are the supply voltage pins for the digital CC control inputs (S to S , LE, E and E ). The V to GND 1 3 1 2 CC GENERAL DESCRIPTION ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. The 74HC/HCT4353 are high-speed Si-gate CMOS The analog inputs/outputs (nY and nY , and nZ) can 0 1 devices. They are specified in compliance with JEDEC swing between V as a positive limit and V as a CC EE standard no. 7A. negative limit. V - V may not exceed 10.0 V. CC EE The 74HC/HCT4353 are triple 2-channel analog For operation as a digital multiplexer/demultiplexer, V is EE multiplexers/demultiplexers with two common enable connected to GND (typically ground). inputs (E and E ) and a latch enable input (LE). Each 1 2 QUICK REFERENCE DATA V = GND = 0 V T = 25 C t = t = 6 ns EE amb r f TYPICAL SYMBOL PARAMETER CONDITIONS UNIT HC HCT t / t turn ON time E ,E or S to V C = 50 pF R =1 k 29 21 ns PZH PZL 1 2 n os L L V = 5 V CC t / t turn OFF time E ,E or S to V 20 22 ns PHZ PLZ 1 2 n os C input capacitance 3.5 3.5 pF I C power dissipation capacitance per switch notes 1 and 2 23 23 pF PD C max. switch capacitance S independent (Y) 5 5 pF common (Z) 8 8 pF 2 Notes (C C ) V f = sum of outputs L S CC o 1. C is used to determine the dynamic power V = supply voltage in V PD CC dissipation (P in W): D 2. For HC the condition is V = GND to V I CC P = For HCT the condition is V = GND to V - 1.5 V D I CC 2 2 C V f + (C +C ) V f where: PD CC i L S CC o f = input frequency in MHz i ORDERING INFORMATION C = output load capacitance in pF L See 74HC/HCT/HCU/HCMOS Logic Package f = output frequency in MHz o Information. C = max. switch capacitance in pF S December 1990 2

Tariff Desc

8542.31.00 51 No ..Application Specific (Digital) Integrated Circuits (ASIC)

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