74LVC2G17GW,125

74LVC2G17 Dual non-inverting Schmitt trigger with 5 V tolerant input Rev. 10 21 June 2021 Product data sheet 1. General description The 74LVC2G17 is a dual buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down applications using I . The I circuitry OFF OFF disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity 24 mA output drive (V = 3.0 V) CC CMOS low-power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels I circuitry provides partial Power-down mode operation OFF Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD-8B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from -40 C to +85 C and -40 C to +125 C 3. Applications Wave and pulse shapers for highly noisy environmentsNexperia 74LVC2G17 Dual non-inverting Schmitt trigger with 5 V tolerant input 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC2G17GW -40 C to +125 C SC-88 plastic surface-mounted package 6 leads SOT363 74LVC2G17GV -40 C to +125 C SC-74 plastic surface-mounted package 6 leads SOT457 TSOP6 74LVC2G17GM -40 C to +125 C XSON6 plastic extremely thin small outline package SOT886 no leads 6 terminals body 1 1.45 0.5 mm 74LVC2G17GN -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1115 6 terminals body 0.9 1.0 0.35 mm 74LVC2G17GS -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mm 5. Marking Table 2. Marking codes Type number Marking code 1 74LVC2G17GW VV 74LVC2G17GV VV 74LVC2G17GM VV 74LVC2G17GN VV 74LVC2G17GS VV 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 6. Functional diagram 1 6 1A 1Y 1 1A 1Y 6 3 2A 2Y 4 3 4 2A 2Y mnb066 mnb067 mnb068 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram 74LVC2G17 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 10 21 June 2021 2 / 17