74HC1G125-Q100 74HCT1G125-Q100 Bus buffer/line driver 3-state Rev. 1 18 June 2013 Product data sheet 1. General description The 74HC1G125-Q100 74HCT1G125-Q100 is a single buffer/line driver with 3-state output. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V . CC This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from 40 C to +85 C and from 40 C to +125 C Input levels: For 74HC1G125-Q100: CMOS level For 74HCT1G125-Q100: TTL level Symmetrical output impedance High noise immunity Low power consumption Balanced propagation delays ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC1G125GW-Q100 40 C to +125 C TSSOP5 plastic thin shrink small outline package 5 leads SOT353-1 body width 1.25 mm 74HCT1G125GW-Q100 74HC1G125GV-Q100 40 C to +125 C SC-74A plastic surface mounted package 5 leads SOT753 74HCT1G125GV-Q10074HC1G125-Q100 74HCT1G125-Q100 Nexperia Bus buffer/line driver 3-state 4. Marking Table 2. Marking 1 Type number Marking code 74HC1G125GW-Q100 HM 74HCT1G125GW-Q100 TM 74HC1G125GV-Q100 H25 74HCT1G125GV-Q100 T25 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram AY 4 2 2 4 1 EN 1 OE mna119 mna118 Fig 1. Logic symbol Fig 2. IEC logic symbol Y A OE mna120 Fig 3. Logic diagram 6. Pinning information 6.1 Pinning +& * 4 +&7 * 4 2 ( 9 *1 < DDD Fig 4. Pin configuration 74HC HCT1G125 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 1 18 June 2013 2 of 16 &&