MP20073 2A, 1.3V6.0V DDR Memory Termination Regulator The Future of Analog IC Technology DESCRIPTION FEATURES VDDQ Voltage Range: 1.3V to 6.0 V The MP20073 integrates the DDR memory Up to 2A Integrated Sink/Source Linear termination regulator with the output voltage Regulator with Accurate VREF/2 Divider (VTT) and a buffered VTTREF outputs is a half Reference for DDR Termination of VREF. Requires Only 20F Ceramic Output The VTT-LDO is a 2A sink/source tracking Capacitance termination regulator. It is specifically designed Drive Voltage : 3.3V for low-cost/low-external component count 1.3V Input (VDDQ) Helps Reduce Total systems, where space is a premium. Power Dissipation The MP20073 maintains a fast transient Integrated Divider Tracks VREF for VTT response only requiring 20F (2x10F) of and VTTREF ceramic output capacitance. The MP20073 Kelvin Sensing (VTTSEN) supports Kelvin sensing functions. 30mV Accuracy for VTT and VTTREF Built-In Soft-Start, UVLO and OCL The MP20073 is available in the 8-pin MSOP with Exposed PAD package and is specified Thermal Shutdown o o from -40 C to 85 C. APPLICATIONS Notebook DDR2/3 Memory Supply and Termination Voltage in ACPI Compliant Active Termination Busses All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Products, Quality Assurance page. MPS and The Future of Analog IC Technology are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION VDDQ 1 R3 DDQ 20 8 6 REF VTTREF VTTREF MP20073 5 4 VDRV VTTSEN 3.3V R2 100k 2 7 VTT VTT EN VTTEN GND C9 3 NC MP20073 Rev. 1.0 www.MonolithicPower.com 1 10/16/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. 2012 MPS. All Rights Reserved. MP20073 2A, 1.3V-6.0V INPUT, DDR MEMORY TERMINATION REGUALTOR ORDERING INFORMATION Part Number* Package Top Marking Free Air Temperature (T ) A MP20073DH MSOP8E 20073 -40 C to +85 C * For Tape & Reel, add suffix Z (e.g. MP20073DHZ) For RoHS Compliant Packaging, add suffix LF (e.g. MP20073DHLFZ) PACKAGE REFERENCE TOP VIEW DDQ 1 8 VTTREF VTT 2 7 EN GND 3 6 REF VTTSEN 4 5 VDRV EXPOSED PAD ON BACKSIDE (1) (4) ABSOLUTE MAXIMUM RATINGS Thermal Resistance JA JC o Supply Voltage V ...................... -0.3V to 6.0V MSOP8E.................................. 80...... 12... C/W DDQ Drive Voltage VDRV..................... -0.3V to 6.0V Notes: All Other Pins................................ -0.3V to 6.0V 1) Exceeding these ratings may damage the device. (2) 2) The maximum allowable power dissipation is a function of the Continuous Power Dissipation (T = +25C) A maximum junction temperature T(MAX), the junction-to- J ...........................................................1.56W ambient thermal resistance , and the ambient temperature JA o T . The maximum allowable continuous power dissipation at A Junction Temperature...............................150 C o any ambient temperature is calculated by P (MAX)=(T (MAX)- D J Lead Temperature ....................................260 C T )/ . Exceeding the maximum allowable power dissipation A JA o o Storage Temperature .............. -50 C to +150 C will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry (3) protects the device from permanent damage. Recommended Operating Conditions 3) The device is not guaranteed to function outside of its operating Drive Voltage VDRV.......................... 3.3V to 5V conditions. o o 4) Measured on JESD51-7 4-layer board. Operating Junct. Temp (T ) ......-40 C to +125 C J MP20073 Rev. 1.0 www.MonolithicPower.com 2 10/16/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. 2012 MPS. All Rights Reserved.