Product Information

ZL40231LDG1

ZL40231LDG1 electronic component of Microchip

Datasheet
Clock Buffer 3 x10 LVPECL/LVDS /HCSL Fanout Buffer

Manufacturer: Microchip
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (AUD)

1: AUD 16.1365 ( AUD 17.75 Inc GST) ea
Line Total: AUD 16.1365 ( AUD 17.75 Inc GST)

66 - Global Stock
Ships to you between
Fri. 26 Jul to Tue. 30 Jul
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
303 - Global Stock


Ships to you between Fri. 26 Jul to Tue. 30 Jul

MOQ : 1
Multiples : 1

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ZL40231LDG1
Microchip

1 : AUD 12.8446
25 : AUD 12.5969
100 : AUD 12.19
260 : AUD 12.1723
1040 : AUD 11.8892

     
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Data Sheet ZL40231 Low Skew, Low Additive Jitter, 10 output LVPECL/LVDS/HCSL Fanout Buffer with one LVCMOS output Ordering Information Features ZL40231LDG1 48 Pin QFN Trays 3 to 1 input Multiplexer: Two inputs accept any ZL40231LDF1 48 pin QFN Tape and Reel differential (LVPECL, HCSL, LVDS, SSTL, CML, LVCMOS) or a single ended signal and the third Package size: 7 x 7 mm input accepts a crystal or a single ended signal -40 C to +85 C -40 C to +85 C Ten differential LVPECL/LVDS/HCSL outputs Applications One LVCMOS output General purpose clock distribution Ultra-low additive jitter: 24fs (integration band: Low jitter clock trees 12kHz to 20MHz at 625MHz clock frequency) Logic translation Supports clock frequencies from 0 to 1.6GHz Clock and data signal restoration Supports 2.5V or 3.3V power supplies on LVPECL, Wired communications: OTN, SONET/SDH, GE, 10 GE, LVDS or HCSL outputs FC and 10G FC Supports 1.5V, 1.8V, 2.5V or 3.3V on LVCMOS PCI Express generation 1/2/3/4 clock distribution outputs Wireless communications Embedded Low Drop Out (LDO) Voltage regulator provides superior Power Supply Noise Rejection High performance microprocessor clock distribution Test Equipment Maximum output to output skew of 40ps Device controlled via control pins OUTA TYPE SEL0 Bank A OUTA TYPE SEL1 OUT A TYPE SEL 1:0 BANK A OUTPUT OUT0 p 00 LVECL 01 LVDS OUT0 n 10 HCSL 11 HIGH-Z OUT1 p OUT1 n IN SEL0 IN SEL1 OUT2 p OUT2 n IN0 p OUT3 p IN0 n OUT3 n IN1 p OUT4 p IN1 n OUT4 n Bank B OUT5 p XOUT ZL40231 OUT5 n OUT6 p XIN OUT6 n OUT7 p OUT7 n OUT8 p OUT8 n OUT B TYPE SEL 1:0 BANK B OUTPUT 00 LVECL 01 LVDS 10 HCSL 11 HIGH-Z OUT9 p OUTB TYPE SEL0 OUT9 n OUTB TYPE SEL1 Synchronous OUT10 LVCMOS OE OE Figure 1. Functional Block Diagram ZL40231 October 2018 1 2018 Microsemi Corporation Data Sheet ZL40231 Table of Contents Features ..................................................................................................................................... 1 Applications................................................................................................................................ 1 Table of Contents ...................................................................................................................... 2 Pin Diagram ............................................................................................................................... 5 Pin Descriptions ......................................................................................................................... 6 Functional Description ............................................................................................................... 9 Clock Inputs ............................................................................................................................... 9 Clock Outputs .......................................................................................................................... 12 Crystal Oscillator Input ............................................................................................................. 13 Termination of unused inputs and outputs .............................................................................. 13 Power Consumption ................................................................................................................ 13 Power Supply Filtering ............................................................................................................. 14 Power Supplies and Power-up Sequence ............................................................................... 14 Host Interface .......................................................................................................................... 15 Typical device performance ..................................................................................................... 16 AC and DC Electrical Characteristics ...................................................................................... 20 Absolute Maximum Ratings ..................................................................................................... 20 Recommended Operating Conditions ..................................................................................... 20 Change History ........................................................................................................................ 34 Package Outline ...................................................................................................................... 35 ZL40231 October 2018 2 2018 Microsemi Corporation

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

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