Product Information

SY89831UMG

SY89831UMG electronic component of Microchip

Datasheet
Clock Buffer 2.5V/3.3V 1:4 PECL Fanout Buffer (I Temp, Green)

Manufacturer: Microchip
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (AUD)

1: AUD 12.2785 ( AUD 13.51 Inc GST) ea
Line Total: AUD 12.2785 ( AUD 13.51 Inc GST)

549 - Global Stock
Ships to you between
Fri. 26 Jul to Tue. 30 Jul
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
549 - Global Stock


Ships to you between Fri. 26 Jul to Tue. 30 Jul

MOQ : 1
Multiples : 1

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SY89831UMG
Microchip

1 : AUD 12.2785
100 : AUD 10.5446
500 : AUD 9.5715

190 - Global Stock


Ships to you between Mon. 22 Jul to Fri. 26 Jul

MOQ : 4
Multiples : 1

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SY89831UMG
Microchip

4 : AUD 20.275
10 : AUD 14.775
50 : AUD 13.1
100 : AUD 12.3

     
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SY89831U Ultra-Precision 1:4 LVPECL Fanout Buffer/Translator with Internal Termination Precision Edge General Description The SY89831U is a high-speed, 2GHz differential LVPECL Precision Edge 1:4 fanout buffer optimized for ultra-low skew applications. Within-device skew is guaranteed to be less than 20ps Features (5ps typ.) over supply voltage and temperature. The differential input buffer has a unique internal termination Guaranteed AC performance over temperature and design that allows access to the termination network voltage through a VT pin. This feature allows the device to easily DC-to 2.5GHz throughput (typical) interface to different logic standards. A VREF-AC 350ps propagation delay (IN-to-Q) (typical) reference output is included for AC-coupled applications. 5ps within-device skew (typical) The SY89831U is a part of Micrel s high-speed clock 150ps rise/fall time (typical) synchronization family. For applications that require a different I/O combination, consult Micrels website at: Ultra-low jitter design www.micrel.com, and choose from a comprehensive 62fs RMS phase jitter (typical) product line of high-speed, low-skew fanout buffers, Unique patent-pending input termination and VT pin translators, and clock generators. accepts DC- and AC-coupled differential inputs Datasheets and support documentation are available on 800mV, 100K LVPECL typical output swing Micrels web site at: www.micrel.com. Power supply 2.5V 5% or 3.3V 10% Industrial temperature range: 40C to +85C Available in 16-pin (3mm x 3mm) MLF package Applications Processor clock distribution SONET clock distribution Fibre Channel clock distribution Gigabit Ethernet clock distribution United States Patent No. RE44,134 Precision Edge is a registered trademark of Micrel, Inc. MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc. Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 Micrel, Inc. SY89831U (1) Ordering Information Part Number Package Type Operating Range Package Marking Lead Finish (2) SY89831UMG MLF-16 Industrial 831U with Pb-Free bar-line indicator NiPdAu Pb-Free (2, 3) SY89831UMGTR MLF-16 Industrial 831U with Pb-Free bar-line indicator NiPdAu Pb-Free Notes: 1. Contact factory for die availability. Dice are guaranteed at T = 25C, DC electricals only. A 2. Pb-Free package is recommended for new designs. 3. Tape and Reel. Pin Configuration 16-MLF (MLF-16) Pin Description Pin Pin Name Functional Description 15, 16 Q0, /Q0 Differential 100K LVPECL Outputs: These LVPECL outputs are the precision, low-skew copies of the inputs. Please refer to the Truth Table section for details. Unused output pairs may be left open. 1, 2 Q1, /Q1 Terminate with 50 to V 2V. See the Output Termination Recommendations section for more CC 3, 4 Q2, /Q2 details. 5, 6 Q3, /Q3 8 EN This single-ended TTL/CMOS-compatible input functions as a synchronous output enable. The synchronous enable ensures that enable/disable only occurs when the outputs are in a logic low state. Note that this input is internally connected to a 25k pull-up resistor and will default to logic high state (enabled) if left open. 9, 12 /IN, IN Differential Inputs: These input pairs are the differential signal inputs to the device. Inputs accept AC- or DC-coupled differential signs as small as 100mV. Each pin of a pair internally terminates to a VT pin through 50. Note that these inputs default to an intermediate state if left open. Please refer to the Input Interface Applications section for more details. 10 VREF-AC Reference Voltage: These outputs bias to VCC 1.4V. They are used when AC coupling the inputs (IN, /IN). For AC-coupled applications, connect VREF-AC to the VT pin and bypass with a 0.01F low- ESR capacitor to V . See the Input Interface Applications section for more details. Maximum CC sink/source current is 1.5mA. Due to the limited drive capability, each VREF-AC pin should only drive its respective VT pin. If VREF-AC is used with a 2.5V supply, make sure the input swing is large enough to comply with the V min. spec. IH Revision 7.0 January 17, 2014 2 hbwhelp micrel.com or (408) 955-1690

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8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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