Product Information

SY89113UMY-TR

SY89113UMY-TR electronic component of Microchip

Datasheet
Encoders, Decoders, Multiplexers & Demultiplexers 1:12 LVPECL Fanout w/ 2:1 MUX Input

Manufacturer: Microchip
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Price (AUD)

1: AUD 17.8159 ( AUD 19.6 Inc GST) ea
Line Total: AUD 17.8159 ( AUD 19.6 Inc GST)

2706 - Global Stock
Ships to you between
Thu. 18 Jul to Mon. 22 Jul
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
2910 - Global Stock


Ships to you between Thu. 18 Jul to Mon. 22 Jul

MOQ : 1
Multiples : 1

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SY89113UMY-TR
Microchip

1 : AUD 17.2677
100 : AUD 14.3838
500 : AUD 13.0746

     
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SY89113U 2.5V Low Jitter, Low Skew 1:12 LVDS Fanout Buffer with 2:1 Input MUX and Internal Termination General Description The SY89113U is a 2.5V low jitter, low skew, 1:12 LVDS fanout buffer optimized for precision telecom Precision Edge and enterprise server distribution applications. The Features input includes a 2:1 MUX for clock switchover applications. Unlike other multiplexers, this input Selects between 1 of 2 inputs, and provides 12 includes a unique isolation design that minimizes precision, low skew LVDS output copies channel-to-channel crosstalk. The SY89113U Guaranteed AC performance over temperature and distributes clock frequencies from DC to >1GHz voltage: guaranteed over temperature and voltage. The DC to >1GHz throughput SY89113U incorporates a synchronous output enable <975ps propagation delay CLK0-to-Q (EN) so that the outputs will only be enabled/disabled <250ps rise/fall time when they are already in the LOW state. <25ps output-to-output skew CLK0 differential input includes Micrel s unique, 3-pin Ultra-low jitter design: input termination architecture that directly interfaces to 130fs RMS phase jitter (Typ) any differential signal (AC- or DC-coupled) as small as 0.7ps crosstalk induced jitter RMS 100mV (200mV ) without any level shifting or PP Unique, patent-pending 2:1 input MUX provides termination resistor networks in the signal path. superior isolation to minimize channel-to-channel CLK1 differential input includes a new version of crosstalk Micrel s unique, Any-Input architecture that directly CLK0 input features a unique, patent-pending input interfaces with single-ended TTL/CMOS logic termination and VT pin that accepts AC- and DC- (including 3.3V logic), single-ended LVPECL, coupled inputs (CML, LVPECL, LVDS) differential (AC- or DC-coupled) LVDS, HSTL, CML, and LVPECL logic levels as small as 200mV CLK1 accepts virtually any logic standard: (400mV ). CLK1 input requires external termination. PP Single-ended: TTL/CMOS (including 3.3V logic), LVPECL LVDS output swing 325mV into 100 with extremely fast rise/fall time guaranteed to be less than 250ps. Differential: LVPECL, LVDS, CML, HSTL The SY89113U operates from a 2.5V5% supply and 325mV LVDS-compatible output swing is guaranteed over the full industrial temperature Power supply: 2.5V +5% range of -40C to +85C. The SY89113U is part of Industrial temperature range 40C to +85C Micrel s high-speed, Precision Edge product line. Available in 44-pin (7mm x 7mm) QFN package All support documentation can be found on Micrels web site at: www.micrel.com. Applications Multi-processor server SONET/SDH clock/data distribution Fibre Channel distribution Gigabit Ethernet clock distribution United States Patent No. RE44,134 Precision Edge is a registered trademark of Micrel, Inc. Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 Micrel, Inc. SY89113U Functional Block Diagram Oct. 1, 2013 2 M9999-120607 hbwhelp micrel.com or (408) 955-1690

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

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