Product Information

HV5630PJ-G M903

HV5630PJ-G M903 electronic component of Microchip

Datasheet
Serial to Parallel Logic Converters 32-CHANNEL CONVERTER

Manufacturer: Microchip
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (AUD)

500: AUD 9.1714 ( AUD 10.09 Inc GST) ea
Line Total: AUD 4585.7 ( AUD 5044.27 Inc GST)

0 - Global Stock
MOQ: 500  Multiples: 500
Pack Size: 500
Availability Price Quantity
0 - Global Stock


Ships to you between Fri. 26 Jul to Tue. 30 Jul

MOQ : 500
Multiples : 500

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HV5630PJ-G M903
Microchip

500 : AUD 9.1714

     
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Supertex inc. HV5630 32-Channel Serial to Parallel Converter With Open Drain Outputs Features General Description Processed with HVCMOS technology The HV5630 is a low-voltage serial to high-voltage parallel converter with open drain outputs. This device has been designed Sink current minimum 100mA for use as a driver for AC-electroluminescent displays. It can also Shift register speed 8.0MHz be used in any application requiring multiple output high voltage Polarity and Blanking inputs current sinking capabilities such as driving inkjet and electrostatic CMOS compatible inputs print heads, plasma panels, vacuum fluorescent, or large matrix Forward and reverse shifting options LCD displays. Diode to VPP allows efficient power recovery This device consists of a 32-bit shift register, 32 latches, and control logic to perform the polarity select and blanking of the outputs. Data is shifted through the shift register on the high to low transition of the clock. The HV5630 shifts in the clockwise direction when viewed from the top of the package. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register. Operation of the shift register is not affected by the LE (latch enable), BL (blanking), or the POL (polarity) inputs. Transfer of data from the shift register to the latch occurs when the LE (latch enable) input is high. The data in the latch is stored when LE is low. Functional Block Diagram POL BL LE HV 1 OUT DATA Latch INPUT HV 2 OUT CLK Latch 32-Bit (Outputs 3 to 30 not shown) Shift Register HV 31 OUT Latch HV 32 OUT DATA Latch OUT Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com HV5630 Ordering Information Package Option 44-Lead Quad Device Plastic Chip Carrier .653x.653in body .180in height (max) .050in pitch HV5630 HV5630PJ-G -G indicates package is RoHS compliant (Green) Pin Configuration Absolute Maximum Ratings 6 1 44 40 Parameter Value 1 Supply voltage, V -0.5V to +15V DD 1 Output voltage, V -0.5V to +315V PP 1 Logic input levels -0.5V to V +0.5V DD 2 Ground current 1.5A 3 Continuous total power dissipation 1200mW 44-Lead PLCC (PJ) (top view) O O Operating temperature range -40 C to +85 C O O Product Marking Storage temperature range -65 C to +150 C Top Marking Absolute Maximum Ratings are those values beyond which damage to the device may occur. YY = Year Sealed Functional operation under these conditions is not implied. Continuous operation of the device YYWW AAA at the absolute rating level may affect device reliability. All voltages are referenced to device WW = Week Sealed HV5630PJ ground. LLLLLLLLLL L = Lot Number A = Assembler ID Notes: Bottom Marking C = Country of Origin* 1. All voltages are referenced to V SS = Green Packaging 2. Duty cycle is limited by the total power dissipated in the package CCCCCCCCCCC 3. For operation above 25C ambient derate linearly to maximum operating *May be part of top marking temperature at 20mW/C. 44-Lead PLCC (PJ) Package may or may not include the following marks: Si or Recommended Operating Conditions Symbol Parameter Min Max Units Conditions V Logic voltage supply 10.8 13.2 V --- DD HV High voltage output -0.3 +300 V --- OUT V Input high voltage V -2.0 V V --- IH DD DD V Input low voltage 0 2.0 V --- IL f Clock frequency - 8.0 MHz --- CLK O T Operating free-air temperature -40 +85 C --- A Power-Up Sequence Power-up sequence should be the following: 1. Connect ground 2. Apply V DD 3. Set all inputs to a known state Power-down sequence should be the reverse of the above. Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 2

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8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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