Product Information

HV5630PJ-G

HV5630PJ-G electronic component of Microchip

Datasheet
Serial to Parallel Logic Converters 300V 32Ch Open D Out

Manufacturer: Microchip
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (AUD)

1: AUD 17.1269 ( AUD 18.84 Inc GST) ea
Line Total: AUD 17.1269 ( AUD 18.84 Inc GST)

0 - Global Stock
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
0 - Global Stock


Ships to you between Mon. 22 Jul to Fri. 26 Jul

MOQ : 54
Multiples : 54

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HV5630PJ-G
Microchip

54 : AUD 26.1062

0 - Global Stock


Ships to you between Fri. 26 Jul to Tue. 30 Jul

MOQ : 1
Multiples : 1

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HV5630PJ-G
Microchip

1 : AUD 14.9677
108 : AUD 13.6408
513 : AUD 13.1808

     
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HV5630 32-Channel Serial-to-Parallel Converter With Open Drain Outputs Features General Description 100 mA Minimum Sink Current The HV5630 is a low-voltage to high-voltage serial-to-parallel converter with open drain outputs. 8 MHz Shift Register Speed This device has been designed for use as a driver for Polarity and Blanking Inputs AC-electroluminescent displays. It can also be used in CMOS-compatible Inputs any application requiring multiple-output high-voltage Forward and Reverse Shifting Options current-sinking capabilities, such as driving inkjet and Diode to V allows Efficient Power Recovery electrostatic print heads, plasma panels, vacuum PP fluorescent and large matrix LCD displays. Applications The device consists of a 32-bit Shift register, 32 latches and control logic to perform the polarity select and Display Driver blanking of the outputs. Data is shifted through the Shift Inkjet Driver register on the high-to-low transition of the clock. The Print Head Driver HV5630 shifts in a clockwise direction when viewed Microelectromechanical Systems Applications from the top of the package. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the Shift register. The operation of the Shift register is not affected by the latch enable (LE), blanking (BL) and polarity (POL) inputs. The transfer of data from the Shift register to the latch occurs when the LE input is high. The data in the latch is stored when LE is low. Package Type 44-lead PLCC (Top view) 6 1 44 40 See Table 2-1 for pin information. 2017 Microchip Technology Inc. DS20005855A-page 1HV5630 Functional Block Diagram POL BL LE HV 1 OUT DATA Latch IN HV 2 OUT CLK Latch 32-Bit (Outputs 3 to 30 not shown) Shift Register HV 31 OUT Latch HV 32 OUT DATA Latch OUT DS20005855A-page 2 2017 Microchip Technology Inc.

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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