Product Information

HV5623K7-G-M933

HV5623K7-G-M933 electronic component of Microchip

Datasheet
Serial to Parallel Logic Converters 32-CHANNEL, SERIAL TO PARALLEL CONVERTER w/OPEN DRAIN OUTPUTS

Manufacturer: Microchip
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (AUD)

3300: AUD 16.2885 ( AUD 17.92 Inc GST) ea
Line Total: AUD 53752.05 ( AUD 59127.26 Inc GST)

0 - Global Stock
MOQ: 3300  Multiples: 3300
Pack Size: 3300
Availability Price Quantity
0 - Global Stock


Ships to you between Fri. 26 Jul to Tue. 30 Jul

MOQ : 3300
Multiples : 3300

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HV5623K7-G-M933
Microchip

3300 : AUD 13.0038

     
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HV5623 32-Channel Serial-to-Parallel Converter with Open-Drain Outputs Features General Description 100 mA Minimum Sink Current The HV5623 is a low-voltage serial to high-voltage parallel converter with open-drain outputs. This device 16 MHz Shift Register Speed is designed as a driver for AC-electroluminescent Polarity and Blanking Inputs displays. It can also be used in any application CMOS-Compatible Inputs requiring multiple-output high-voltage current sinking capabilities, such as driving inkjet and electrostatic Applications print heads, plasma panels, vacuum fluorescent or large matrix LCD displays. Inkjet and Electrostatic Print Heads AC-Electroluminescent Displays This device consists of a 32-bit Shift register, 32 latches Microelectromechanical Systems (MEMS) and control logic to perform the polarity selection and Applications blanking of the outputs. Data is shifted through the Shift register on the high-to-low transition of the clock. The HV5623 shifts clockwise when viewed from the top of the package. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the Shift register. Operation of the Shift register is not affected by the LE (latch enable), BL (blanking) and the POL (polarity) inputs. Transfer of data from the Shift register to the latch occurs when the LE (latch enable) input is high. The data in the latch is stored when LE is low. Package Type 44-lead QFN (Top view) 44 1 See Table 2-1 for pin information. 2019 Microchip Technology Inc. DS20005702A-page 1HV5623 Functional Block Diagram POL BL LE HV 1 OUT DATA Latch INPUT HV 2 OUT CLK Latch 32-Bit (Outputs 3 to 30 Shift not shown) Register HV 31 OUT Latch HV 32 OUT DATA Latch OUTPUT DS20005702A-page 2 2019 Microchip Technology Inc.

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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