Product Information

5CSEBA4U19C7-N

5CSEBA4U19C7-N electronic component of Intel

Datasheet
FPGA Cyclone® V SE Family 40000 Cells 28nm Technology 1.1V 484-Pin UFBGA

Manufacturer: Intel
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (AUD)

84: AUD 273.6002 ( AUD 300.96 Inc GST) ea
Line Total: AUD 22982.4168 ( AUD 25280.66 Inc GST)

488 - Global Stock
Ships to you between
Thu. 11 Jul to Wed. 17 Jul
MOQ: 84  Multiples: 84
Pack Size: 84
Availability Price Quantity
488 - Global Stock


Ships to you between Thu. 11 Jul to Wed. 17 Jul

MOQ : 84
Multiples : 84
84 : AUD 262.899

     
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Notes:- Show Stocked Products With Similar Attributes.

Cyclone V Device Datasheet ID: 683801 Online Version Send Feedback CV-51002 Version: 2019.11.27Contents Contents Cyclone V Device Datasheet....................................................................................................................................................... 3 Electrical Characteristics...................................................................................................................................................... 4 Operating Conditions..................................................................................................................................................4 Switching Characteristics....................................................................................................................................................24 Transceiver Performance Specifications....................................................................................................................... 25 Core Performance Specifications.................................................................................................................................40 Periphery Performance..............................................................................................................................................45 HPS Specifications....................................................................................................................................................51 Configuration Specifications................................................................................................................................................67 POR Specifications....................................................................................................................................................68 FPGA JTAG Configuration Timing................................................................................................................................ 68 FPP Configuration Timing.......................................................................................................................................... 69 Active Serial (AS) Configuration Timing.......................................................................................................................73 DCLK Frequency Specification in the AS Configuration Scheme.......................................................................................75 Passive Serial (PS) Configuration Timing..................................................................................................................... 75 Initialization............................................................................................................................................................ 77 Configuration Files....................................................................................................................................................77 Minimum Configuration Time Estimation......................................................................................................................79 Remote System Upgrades......................................................................................................................................... 80 User Watchdog Internal Oscillator Frequency Specifications............................................................................................81 I/O Timing....................................................................................................................................................................... 81 Programmable IOE Delay.......................................................................................................................................... 82 Programmable Output Buffer Delay.............................................................................................................................82 Glossary.......................................................................................................................................................................... 83 Document Revision History for Cyclone V Device Datasheet.....................................................................................................89 Cyclone V Device Datasheet Send Feedback 2

Tariff Desc

8542.31.00 52 No ..CMOS and MOS Microprocessors (MPU), Microcontrollers (MCU) and Digital Signal Processors (DSP)

Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Monolithic integrated circuits Digital.
ALTERA
Altera (part of the Intel Group)
Altera (VA)
Altera Corporation
INTEL (ALTERA)
Intel (CPU)
Intel (formerly Altera)
Intel / Altera
INTEL / LEVEL ONE

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