Product Information

XDPS21081XUMA1

XDPS21081XUMA1 electronic component of Infineon

Datasheet
Flyback Regulator Positive Output Step-Up/Step-Down DC-DC Controller IC PG-DSO-12-20

Manufacturer: Infineon
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (AUD)

1: AUD 2.7381 ( AUD 3.01 Inc GST) ea
Line Total: AUD 2.7381 ( AUD 3.01 Inc GST)

2385 - Global Stock
Ships to you between
Thu. 18 Jul to Mon. 22 Jul
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
2385 - Global Stock


Ships to you between Thu. 18 Jul to Mon. 22 Jul

MOQ : 1
Multiples : 1

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XDPS21081XUMA1
Infineon

1 : AUD 2.6715
10 : AUD 2.4238
100 : AUD 2.1938
250 : AUD 2.1408
500 : AUD 1.9992
1000 : AUD 1.9638
2500 : AUD 1.9638

     
Manufacturer
Product Category
Topology
Number of Outputs
Switching Frequency
Duty Cycle - Max
Input Voltage
Output Voltage
Output Current
Minimum Operating Temperature
Maximum Operating Temperature
Mounting Style
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XDPS21081 Forced Quasi Resonant ZVS Flyback controller Based on FW: REV 1.0 Product Highlights Integrated 600 V startup cell for fast startup and direct bus voltage sensing Multi-mode operation with forced quasi resonant (FQR) Zero Voltage Switching (ZVS) mode DCM operation guaranteed Adaptive current limitation for variable Vout Supports low no load input power to meet stringent regulatory standard One pin UART interface for configuration Features Description Low line QR, high line FQR ZVS The XDPS21081 is a digital PWM controller for high density Configurable ZVS enabled line voltage adapter applications based on Forced Quasi-resonant ZVS Low side ZVS MOSFET gate control flyback topology. It provides low line QR and high line FQR ZVS optimization per variable Vout ZVS operation. A wide feature set is provided in a DSO-12 Built-in protection modes package and requires only a minimum of external Brown-in and brownout detection via integrated HV components. An integrated ASSP digital engine provides startup cell advanced algorithms for multi-mode operation and Pb-free lead plating RoHS compliant protection features. A forced quasi resonant ZVS operation Halogen-free according to IEC61249-2-21 support optimized high density adapter system Applications dimensioning. In addition a one-time-programmable (OTP) High density adapter/charger unit is integrated to provide a selective set of configurable parameters, which can be matched to a dedicated system Product Validation design. Qualified for industrial applications according to the relevant tests of JEDEC47/20/22 85 ... 264 VAC VCC ZCD GD1 HV GPIO GD0 XDPS21081 CS MFIO GND Figure 1 Typical application Marking Package FW Revision SP Ordering Code XDPS21081 PG-DSO-12 REV 1.0 SP005415076 Data Sheet Please read the Important Notice and Warnings at the end of this document Revision 2.0 www.infineon.com 2020-08-20 Forced Quasi Resonant ZVS flyback controller Table of contents Description Table of contents Based on FW: REV 1.0 ...................................................................................................................... 1 Product Highlights .......................................................................................................................... 1 Features 1 Applications ................................................................................................................................... 1 Product Validation .......................................................................................................................... 1 Description 1 Table of contents ............................................................................................................................ 2 1 Pin Configuration and Functionality ................................................................................ 4 2 Representative Block Diagram ........................................................................................ 5 3 Introduction .................................................................................................................. 6 4 Functional Description ................................................................................................... 7 4.1 Power supply management .................................................................................................................... 7 4.1.1 VCC capacitor charge-up and startup sequence ............................................................................... 7 4.1.2 Brown-in monitoring .......................................................................................................................... 8 4.1.3 Brown-out protection ........................................................................................................................ 9 4.1.4 During burst mode operation ............................................................................................................ 9 4.1.5 Bang-bang mode during latched and auto-restart operation ....................................................... 10 4.1.5.1 During latched operation............................................................................................................ 11 4.1.5.2 During auto-restart operation .................................................................................................... 11 4.2 Control features ..................................................................................................................................... 12 4.2.1 Reflected voltage sensing and V offset calculation based on output voltage ............................ 14 CS 4.2.1.1 Output voltage sensing via ZCD pin ........................................................................................... 15 4.2.1.2 Ringing suppression time ........................................................................................................... 17 4.2.1.3 Vcs offset calculation based on output voltage sensed at ZCD pin .......................................... 17 4.2.2 Vbulk voltage measurement via HV startup cell ............................................................................. 18 4.2.3 Propagation delay compensation (PDC) ......................................................................................... 18 4.2.4 Soft-start ........................................................................................................................................... 20 4.2.5 Leading edge blanking (LEB) at CS pin ............................................................................................ 20 4.2.6 Spike blanking at CS pin for 2nd level over-current detection (OCP2) .......................................... 21 4.2.7 Gate driver output GD0 and GD1 ..................................................................................................... 21 4.2.8 Multi-mode operation ...................................................................................................................... 22 4.2.8.1 Frequency law setting for XDPS21081 ........................................................................................ 24 4.2.9 Peak current jittering ....................................................................................................................... 24 4.2.10 Burst mode operation ...................................................................................................................... 25 4.2.10.1 Burst mode entry ........................................................................................................................ 26 4.2.10.2 Burst operation ........................................................................................................................... 27 4.2.10.3 Burst mode exit ........................................................................................................................... 27 4.2.11 Quasi Resonant Mode ...................................................................................................................... 27 4.2.12 Forced quasi resonant ZVS mode operation ................................................................................... 28 4.2.13 UART function at GPIO pin ............................................................................................................... 31 4.3 Protection features ............................................................................................................................... 31 4.3.1 Auto-Restart Mode (ARM) ................................................................................................................. 31 4.3.2 Latch Mode (LM) ............................................................................................................................... 32 4.3.3 VCC Under-Voltage lockout (UVOFF) ............................................................................................... 32 4.3.4 Brown-In Protection (BIP) ................................................................................................................ 32 4.3.5 Brown-Out Protection (BOP) ........................................................................................................... 32 Data Sheet 2 Revision 2.0 2020-08-20

Tariff Desc

8542.31.00 51 No ..Application Specific (Digital) Integrated Circuits (ASIC)

Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Monolithic integrated circuits:
CYP
Cypress
Cypress / Spansion
CYPRESS SEMI
Cypress Semicon
Cypress Semiconductor
Cypress Semiconductor Corp
INF
INFINEON
Infineon IR
INFINEON (CYPRESS)
Infineon (IRF)
Infineon / Cypress
Infineon / IR
INFINEON TECH ICs
Infineon Technologies
INFINEON TECHNOLOGIES AG
Infineon Technologies Americas Corp.
Infinite Power Solutions
INTERNATIONAL RECTIF
INTERNATIONAL RECTIFIER
International Rectifier HiRel Products
INTL RECTIFIER
IR
IRH
Ramtron
Ramtron / Cypress Semiconductor
Ramtron International Corp
SP9
SPANSION

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