CY96690 Series
2
F MC-16FX 16-Bit Proprietary Microcontroller
2
CY96690 series is based on Cypress advanced F MC-16FX architecture (16-bit with instruction pipeline for RISC-like
2
performance). The CPU uses the same instruction set as the established F MC-16LX family thus allowing for easy migration of
2 2 2
F MC-16LX Software to the new F MC-16FX products. F MC-16FX product improvements compared to the previous generation
include significantly improved performance - even at the same operation frequency, reduced power consumption and faster
start-up time.
For high processing speed at optimized power consumption an internal PLL can be selected to supply the
CPU with up to 32MHz operation frequency from an external 4MHz to 8MHz resonator. The result is a minimum instruction cycle
time of 31.2ns going together with excellent EMI behavior. The emitted power is minimized by the on-chip voltage regulator that
reduces the internal CPU voltage. A flexible clock tree allows selecting suitable operation frequencies for peripheral resources
independent of the CPU speed.
Features
Reset is generated when supply voltage falls below
Technology
programmable reference voltage
0.18m CMOS
Code Security
CPU
Protects Flash Memory content from unintended read-out
2
F MC-16FX CPU
DMA
Optimized instruction set for controller applications (bit, byte,
word and long-word data types, 23 different addressing
Automatic transfer function independent of CPU, can be
modes, barrel shift, variety of pointers) assigned freely to resources
8-byte instruction queue
Interrupts
Signed multiply (16-bit 16-bit) and divide (32-bit/16-bit)
Fast Interrupt processing
instructions available
8 programmable priority levels
System Clock
Non-Maskable Interrupt (NMI)
On-chip PLL clock multiplier ( 1 to 8, 1 when PLL stop)
CAN
4MHz to 8MHz crystal oscillator
(maximum frequency when using ceramic resonator
Supports CAN protocol version 2.0 part A and B
depends on Q-factor)
ISO16845 certified
Up to 8MHz external clock for devices with fast clock input
Bit rates up to 1Mbps
feature
32 message objects
32.768kHz subsystem quartz clock
Each message object has its own identifier mask
100kHz/2MHz internal RC clock for quick and safe startup,
clock stop detection function, watchdog
Programmable FIFO mode (concatenation of message
objects)
Clock source selectable from mainclock oscillator, subclock
oscillator and on-chip RC oscillator, independently for CPU
Maskable interrupt
and 2 clock domains of peripherals
Disabled Automatic Retransmission mode for Time
The subclock oscillator is enabled by the Boot ROM
Triggered CAN applications
program controlled by a configuration marker after a Power
Programmable loop-back mode for self-test operation
or External reset
Low Power Consumption - 13 operating modes (different
USART
Run, Sleep, Timer, Stop modes)
Full duplex USARTs (SCI/LIN)
On-Chip Voltage Regulator
Wide range of baud rate settings using a dedicated reload
timer
Internal voltage regulator supports a wide MCU supply
voltage range (Min=2.7V), offering low power consumption
Special synchronous options for adapting to different
synchronous serial protocols
Low Voltage Detection Function
LIN functionality working either as master or slave LIN
device.
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document Number: 002-04717 Rev. *B Revised December 28, 2017
CY96690 Series
Extended support for LIN-Protocol (with 16-byte FIFO for
16-bit down counter, cycle and duty setting registers
selected channels) to reduce interrupt load.
Can be used as 2 8-bit PPG
2
Interrupt at trigger, counter borrow and/or duty match
I C
PWM operation and one-shot operation
Up to 400kbps
Internal prescaler allows 1, 1/4, 1/16, 1/64 of peripheral
Master and Slave functionality, 7-bit and 10-bit addressing
clock as counter clock or of selected Reload timer
underflow as clock input
A/D Converter
Can be triggered by software or reload timer
SAR-type
Can trigger ADC conversion
8/10-bit resolution
Timing point capture
Signals interrupt on conversion end, single conversion
mode, continuous conversion mode, stop conversion mode,
Start delay
activation by software, external trigger, reload timers and
PPGs
Stepping Motor Controller
Range Comparator Function
Stepping Motor Controller with integrated high current
output drivers
Scan disable Function
Four high current outputs for each channel
ADC Pulse Detection Function
Two synchronized 8/10-bit PWMs per channel
Source Clock Timers
Internal prescaling for PWM clock: 1, 1/4, 1/5, 1/6, 1/8,
Three independent clock timers (23-bit RC clock timer,
1/10, 1/12, 1/16 of peripheral clock
23-bit Main clock timer, 17-bit Sub clock timer)
Dedicated power supply for high current output drivers
Hardware Watchdog Timer
LCD Controller
Hardware watchdog timer is active after reset
LCD controller with up to 4COM 36SEG
Window function of Watchdog Timer is used to select the
Internal or external voltage generation
lower window limit of the watchdog interval
Duty cycle: Selectable from options: 1/2, 1/3 and 1/4
Reload Timers
Fixed 1/3 bias
16-bit wide
Programmable frame period
1 2 3 4 5 6
Prescaler with 1/2 , 1/2 , 1/2 , 1/2 , 1/2 , 1/2 of peripheral
Clock source selectable from four options (main clock,
clock frequency
peripheral clock, subclock or RC oscillator clock)
Event count function
Internal divider resistors or external divider resistors
On-chip data memory for display
Free-Running Timers
LCD display can be operated in Timer Mode
Signals an interrupt on overflow, supports timer clear upon
match with Output Compare (0, 4)
Blank display: selectable
1 2 3 4 5 6 7 8
Prescaler with 1, 1/2 , 1/2 , 1/2 , 1/2 , 1/2 , 1/2 , 1/2 , 1/2 All SEG, COM and V pins can be switched between
of peripheral clock frequency general and specialized purposes
Input Capture Units Sound Generator
8-bit PWM signal is mixed with tone frequency from 16-bit
16-bit wide
reload counter
Signals an interrupt upon external event
PWM clock by internal prescaler: 1, 1/2, 1/4, 1/8 of
Rising edge, Falling edge or Both (rising & falling) edges
peripheral clock
sensitive
Real Time Clock
Output Compare Units
Operational on main oscillation (4MHz), sub oscillation
16-bit wide
(32kHz) or RC oscillation (100kHz/2MHz)
Signals an interrupt when a match with Free-running Timer
Capable to correct oscillation deviation of Sub clock or RC
occurs
oscillator clock (clock calibration)
A pair of compare registers can be used to generate an
Read/write accessible second/minute/hour registers
output signal
Can signal interrupts every half
second/second/minute/hour/day
Programmable Pulse Generator
Document Number: 002-04717 Rev. *B Page 2 of 74