MB96670 Series 2 F MC-16FX 16-Bit Microcontroller 2 MB96670 series is based on Cypresss advanced F MC-16FX architecture (16-bit with instruction pipeline for RISC-like 2 performance). The CPU uses the same instruction set as the established F MC-16LX family thus allowing for easy migration of 2 2 F MC-16LX Software to the new F MC-16FX products. 2 F MC-16FX product improvements compared to the previous generation include significantly improved performance - even at the same operation frequency, reduced power consumption and faster start-up time. For high processing speed at optimized power consumption an internal PLL can be selected to supply the CPU with up to 32MHz operation frequency from an external 4MHz to 8MHz resonator. The result is a minimum instruction cycle time of 31.2ns going together with excellent EMI behavior. The emitted power is minimized by the on-chip voltage regulator that reduces the internal CPU voltage. A flexible clock tree allows selecting suitable operation frequencies for peripheral resources independent of the CPU speed. Features Technology DMA 0.18m CMOS Automatic transfer function independent of CPU, can be assigned freely to resources CPU 2 Interrupts F MC-16FX CPU Fast Interrupt processing Optimized instruction set for controller applications (bit, byte, word and long-word data types, 23 different 8 programmable priority levels addressing modes, barrel shift, variety of pointers) Non-Maskable Interrupt (NMI) 8-byte instruction queue CAN Signed multiply (16-bit 16-bit) and divide (32-bit/16-bit) Supports CAN protocol version 2.0 part A and B instructions available ISO16845 certified System clock Bit rates up to 1Mbps On-chip PLL clock multiplier ( 1 to 8, 1 when PLL stop) 32 message objects 4MHz to 8MHz crystal oscillator Each message object has its own identifier mask (maximum frequency when using ceramic resonator Programmable FIFO mode (concatenation of message depends on Q-factor) objects) Up to 8MHz external clock for devices with fast clock input Maskable interrupt feature Disabled Automatic Retransmission mode for Time 32.768kHz subsystem quartz clock Triggered CAN applications 100kHz/2MHz internal RC clock for quick and safe startup, Programmable loop-back mode for self-test operation clock stop detection function, watchdog Clock source selectable from mainclock oscillator, subclock USART oscillator and on-chip RC oscillator, independently for CPU Full duplex USARTs (SCI/LIN) and 2 clock domains of peripherals Wide range of baud rate settings using a dedicated reload The subclock oscillator is enabled by the Boot ROM timer program controlled by a configuration marker after a Power Special synchronous options for adapting to different or External reset synchronous serial protocols Low Power Consumption - 13 operating modes (different LIN functionality working either as master or slave LIN Run, Sleep, Timer, Stop modes) device On-chip voltage regulator Extended support for LIN-Protocol to reduce interrupt load 2 Internal voltage regulator supports a wide MCU supply I C voltage range (Min=2.7V), offering low power consumption Up to 400kbps Low voltage detection function Master and Slave functionality, 7-bit and 10-bit addressing Reset is generated when supply voltage falls below programmable reference voltage Code Security Protects Flash Memory content from unintended read-out Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-04703 Rev.*A Revised February 18, 2016 MB96670 Series A/D converter LCD Controller SAR-type LCD controller with up to 4COM 24SEG 8/10-bit resolution Internal or external voltage generation Signals interrupt on conversion end, single conversion Duty cycle: Selectable from options: 1/2, 1/3 and 1/4 mode, continuous conversion mode, Fixed 1/3 bias stop conversion mode, activation by software, external trigger, reload timers and PPGs Programmable frame period Range Comparator Function Clock source selectable from four options (main clock, peripheral clock, subclock or RC oscillator clock) Scan Disable Function Internal divider resistors or external divider resistors ADC Pulse Detection Function On-chip data memory for display Source Clock Timers LCD display can be operated in Timer Mode Three independent clock timers (23-bit RC clock timer, Blank display: selectable 23-bit Main clock timer, 17-bit Sub clock timer) All SEG, COM and V pins can be switched between general and specialized purposes Hardware Watchdog Timer Hardware watchdog timer is active after reset Sound Generator Window function of Watchdog Timer is used to select the 8-bit PWM signal is mixed with tone frequency from 16-bit lower window limit of the watchdog interval reload counter PWM clock by internal prescaler: 1, 1/2, 1/4, 1/8 of Reload Timers peripheral clock 16-bit wide 1 2 3 4 5 6 Real Time Clock Prescaler with 1/2 , 1/2 , 1/2 , 1/2 , 1/2 , 1/2 of peripheral clock frequency Operational on main oscillation (4MHz), sub oscillation (32kHz) or RC oscillation (100kHz/2MHz) Event count function Capable to correct oscillation deviation of Sub clock or RC Free-Running Timers oscillator clock (clock calibration) Signals an interrupt on overflow Read/write accessible second/minute/hour registers 1 2 3 4 5 6 7 8 Prescaler with 1, 1/2 , 1/2 , 1/2 , 1/2 , 1/2 , 1/2 , 1/2 , 1/2 Can signal interrupts every half of peripheral clock frequency second/second/minute/hour/day Internal clock divider and prescaler provide exact 1s clock Input Capture Units 16-bit wide External Interrupts Signals an interrupt upon external event Edge or Level sensitive Rising edge, Falling edge or Both (rising & falling) edges Interrupt mask bit per channel sensitive Each available CAN channel RX has an external interrupt for wake-up Programmable Pulse Generator Selected USART channels SIN have an external interrupt 16-bit down counter, cycle and duty setting registers for wake-up Can be used as 2 8-bit PPG Interrupt at trigger, counter borrow and/or duty match Non Maskable Interrupt PWM operation and one-shot operation Disabled after reset, can be enabled by Boot-ROM depending on ROM configuration block Internal prescaler allows 1, 1/4, 1/16, 1/64 of peripheral clock as counter clock or of selected Reload timer Once enabled, can not be disabled other than by reset underflow as clock input High or Low level sensitive Can be triggered by software or reload timer Pin shared with external interrupt 0 Can trigger ADC conversion I/O Ports Timing point capture Most of the external pins can be used as general purpose Stepping Motor Controller I/O Stepping Motor Controller with integrated high current All push-pull outputs (except when used as I2C SDA/SCL output drivers line) Four high current outputs for each channel Bit-wise programmable as input/output or peripheral signal Two synchronized 8/10-bit PWMs per channel Bit-wise programmable input enable Internal prescaling for PWM clock: 1, 1/4, 1/5, 1/6, 1/8, 1/10, One input level per GPIO-pin (either Automotive or CMOS 1/12, 1/16 of peripheral clock hysteresis) Dedicated power supply for high current output drivers Bit-wise programmable pull-up resistor Document Number: 002-04703 Rev.*A Page 2 of 68