CY96380 Series 2 F MC-16FX 16-bit Proprietary Microcontroller CY96380 series is based on Cypress advanced 16FX architecture (16-bit with instruction pipeline for RISC-like performance). The CPU uses the same instruction set as the established 16LX series - thus allowing for easy migration of 16LX Software to the new 16FX products. 16FX improvements compared to the previous generation include significantly improved performance - even at the same operation frequency, reduced power consumption and faster start-up time. For highest processing speed at optimized power consumption an internal PLL can be selected to supply the CPU with up to 56MHz operation frequency from an external 4MHz resonator. The result is a minimum instruction cycle time of 17.8ns going together with excellent EMI behavior. An on-chip clock modulation circuit significantly reduces emission peaks in the frequency spectrum. The emitted power is minimized by the on-chip voltage regulator that reduces the internal CPU voltage. A flexible clock tree allows to select suitable operation frequencies for peripheral resources independent of the CPU speed. Features Technology Low voltage reset 0.18m CMOS Reset is generated when supply voltage is below minimum. CPU Code Security 2 F MC-16FX CPU Protects ROM content from unintended read-out Up to 56 MHz internal, 17.8 ns instruction cycle time Memory Patch Function Optimized instruction set for controller applications (bit, byte, Replaces ROM content word and long-word data types 23 different addressing Can also be used to implement embedded debug support modes barrel shift variety of pointers) 8-byte instruction execution queue DMA Signed multiply (16-bit 16-bit) and divide (32-bit/16-bit) Automatic transfer function independent of CPU, can be instructions available assigned freely to resources System clock Interrupts On-chip PLL clock multiplier (x1 - x25, x1 when PLL stop) Fast Interrupt processing 3 MHz - 16 MHz external crystal oscillator clock (maximum 8 programmable priority levels frequency when using ceramic resonator depends on Non-Maskable Interrupt (NMI) Q-factor). Up to 56 MHz external clock for devices with fast clock input Timers feature Three independent clock timers (23-bit RC clock timer, 23-bit 32-100 kHz subsystem quartz clock Main clock timer, 17-bit Sub clock timer) 100kHz/2MHz internal RC clock for quick and safe startup, Watchdog Timer oscillator stop detection, watchdog Clock source selectable from main- and subclock oscillator (part number suffix W) and on-chip RC oscillator, independently for CPU and 2 clock domains of peripherals. Low Power Consumption - 13 operating modes : (different Run, Sleep, Timer modes, Stop mode) Clock modulator On-chip voltage regulator Internal voltage regulator supports reduced internal MCU voltage, offering low EMI and low power consumption figures Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-04582 Rev. *B Revised March 12, 2018 CY96380 Series CAN Input Capture Units Supports CAN protocol version 2.0 part A and B 16-bit wide ISO16845 certified Signals an interrupt upon external event Bit rates up to 1 Mbit/s Rising edge, falling edge or rising & falling edge sensitive 32 message objects Output Compare Units Each message object has its own identifier mask 16-bit wide Programmable FIFO mode (concatenation of message Signals an interrupt when a match with 16-bit I/O Timer occurs objects) A pair of compare registers can be used to generate an output Maskable interrupt signal. Disabled Automatic Retransmission mode for Time Triggered Programmable Pulse Generator CAN applications 16-bit down counter, cycle and duty setting registers Programmable loop-back mode for self-test operation Interrupt at trigger, counter borrow and/or duty match USART PWM operation and one-shot operation Full duplex USARTs (SCI/LIN) Internal prescaler allows 1, 1/4, 1/16, 1/64 of peripheral clock Wide range of baud rate settings using a dedicated reload timer as counter clock and Reload timer overflow as clock input Special synchronous options for adapting to different Can be triggered by software or reload timer synchronous serial protocols Stepper Motor Controller LIN functionality working either as master or slave LIN device Stepper Motor Controller with integrated high current output 2 I C drivers Up to 400 kbps Four high current outputs for each channel Master and Slave functionality, 8-bit and 10-bit addressing Two synchronized 8/10-bit PWMs per channel A/D converter Internal prescaling for PWM clock: 1, 1/4, 1/5, 1/6, 1/8, 1/10, 1/12, 1/16 of peripheral clock SAR-type Separate power supply for high current output drivers 10-bit resolution LCD Controller Signals interrupt on conversion end, single conversion mode, continuous conversion mode, stop conversion mode, activation LCD controller with up to 4 COM 65 SEG by software, external trigger or reload timer Internal or external voltage generation A/D Converter Reference Voltage switch Duty cycle: Selectable from options: 1/2, 1/3 and 1/4 2 independent positive A/D converter reference voltages Fixed 1/3 bias available Programmable frame period Reload Timers Clock source selectable from three options (peripheral clock, 16-bit wide subclock or RC oscillator clock) 1 2 3 4 5 6 Prescaler with 1/2 , 1/2 , 1/2 , 1/2 , 1/2 , 1/2 of peripheral On-chip drivers for internal divider resistors or external divider clock frequency resistors Event count function On-chip data memory for display Free Running Timers LCD display can be operated in Timer Mode Signals an interrupt on overflow, supports timer clear upon Blank display: selectable 1 2 match with Output Compare (0, 4), Prescaler with 1, 1/2 , 1/2 , 3 4 5 6 7 8 All SEG, COM and V pins can be switched between general 1/2 , 1/2 , 1/2 , 1/2 , 1/2 ,1/2 of peripheral clock frequency and specialized purposes External divided resistors can be also used to shut off the current when LCD is deactivated Document Number: 002-04582 Rev. *B Page 2 of 119