The following document contains information on Cypress products. The document has the series name, product name, and ordering part numbering with the prefix MB. However, Cypress will offer these products to new and existing customers with the series name, product name, and ordering part number with the prefix CY. How to Check the Ordering Part Number 1. Go to www.cypress.com/pcn. 2. Enter the keyword (for example, ordering part number) in the SEARCH PCNS field and click Apply. 3. Click the corresponding title from the search results. 4. Download the Affected Parts List file, which has details of all changes For More Information Please contact your local sales office for additional information about Cypress products and solutions. About Cypress Cypress is the leader in advanced embedded system solutions for the world s most innovative automotive, industrial, smart home appliances, consumer electronics and medical products. Cypress microcontrollers, analog ICs, wireless and USB-based connectivity solutions and reliable, high-performance memories help engineers design differentiated products and get them to market first. Cypress is committed to providing customers with the best support and development resources on the planet enabling them to disrupt markets by creating new product categories in record time. To learn more, go to www.cypress.com. MB91F464AA MB91F464AB FR60 MB91460A Series 32-bit Microcontroller Datasheet MB91460A series is a line of general-purpose 32-bit RISC microcontrollers designed for embedded control applications which require high-speed real-time processing, such as consumer devices and on-board vehicle systems. This series uses the FR60 CPU, which is compatible with the FR family* of CPUs. This series contains the LIN-USART and CAN controllers. Features Function to search from the MSB (most significant bit) for the FR60 CPU core position of the first 0, 1, or changed bit in a word 32-bit RISC, load/store architecture, five-stage pipeline LIN-USART (full duplex double buffer): 5 channels 16-bit fixed-length instructions (basic instructions) Clock synchronous/asynchronous selectable Sync-break detection Instruction execution speed: 1 instruction per cycle Internal dedicated baud rate generator Instructions including memory-to-memory transfer, bit manip- 2 I C bus interface (supports 400 kbps): 1 channel ulation, and barrel shift instructions: Instructions suitable for embedded applications Master/slave transmission and reception Arbitration function, clock synchronisation function Function entry/exit instructions and register data multi-load store instructions : Instructions supporting C CAN controller (C-CAN): 1 channel language Maximum transfer speed: 1 Mbps 32 transmission/reception message buffers Register interlock function: Facilitating assembly-language coding 16-bit PPG timer : 10 channels Built-in multiplier with instruction-level support 16-bit reload timer: 8 channels Signed 32-bit multiplication: 5 cycles 16-bit free-run timer: 8 channels (1 channel each for ICU and Signed 16-bit multiplication: 3 cycles OCU) Interrupts (save PC/PS) : 6 cycles (16 priority levels) Input capture: 8 channels (operates in conjunction with the Harvard architecture enabling program access and data free-run timer) access to be performed simultaneously Output compare: 6 channels (operates in conjunction with the Instructions compatible with the FR family free-run timer) Internal peripheral resources Watchdog timer General-purpose ports : Maximum 73 ports Real-time clock DMAC (DMA Controller) Low-power consumption modes : Sleep/stop mode function Maximum of 5 channels able to operate simultaneously. Supply Supervisor: Low voltage detection circuit for external 2 transfer sources (internal peripheral/software) V 5 and internal 1.8V core voltage DD Activation source can be selected using software. Addressing mode specifies full 32-bit addresses (incre- Clock supervisor ment/decrement/fixed) Monitors the sub-clock (32 kHz) and the main clock (4 MHz) , Transfer mode (demand transfer/burst transfer/step trans- and switches to a recovery clock (CR oscillator, etc.) when the fer/block transfer) oscillations stop. Transfer data size selectable from 8/16/32-bit Clock modulator Multi-byte transfer enabled (by software) Sub-clock calibration DMAC descriptor in I/O areas (200 to 240 , 1000 to H H H Corrects the real-time clock timer when operating with the 32 kHz 1024 ) H or CR oscillator A/D converter (successive approximation type) Main oscillator stabilisation timer 10-bit resolution: 21 channels Generates an interrupt in sub-clock mode after the stabilisation Conversion time: minimum 1 s wait time has elapsed on the 23-bit stabilisation wait time counter External interrupt inputs : 10 channels Sub-oscillator stabilisation timer 2 Shares the CAN RX pin and the I C SDA pin Generates an interrupt in main clock mode after the stabilisation wait time has elapsed on the 15-bit stabilisation wait time counter Bit search module (for REALOS) Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-04600 Rev. *A Revised April 18, 2016