FM16W08 64-Kbit (8 K 8) Wide Voltage Bytewide F-RAM Memory 64-Kbit (8 K 8) Wide Voltage Bytewide F-RAM Memory Industrial temperature: 40 C to +85 C Features 28-pin small outline integrated circuit (SOIC) package 64-Kbit ferroelectric random access memory (F-RAM) logically organized as 8 K 8 Restriction of hazardous substances (RoHS) compliant 14 High-endurance 100 trillion (10 ) read/writes Functional Overview 151-year data retention (see the Data Retention and Endurance table) The FM16W08 is a 8 K 8 nonvolatile memory that reads and NoDelay writes writes similar to a standard SRAM. A ferroelectric random Advanced high-reliability ferroelectric process access memory or F-RAM is nonvolatile, which means that data is retained after power is removed. It provides data retention for SRAM and EEPROM compatible over 151 years while eliminating the reliability concerns, Industry-standard 8 K 8 SRAM and EEPROM pinout functional disadvantages, and system design complexities of 70-ns access time, 130-ns cycle time battery-backed SRAM (BBSRAM). Fast write timing and high write endurance make the F-RAM superior to other types of Superior to battery-backed SRAM modules memory. No battery concerns The FM16W08 operation is similar to that of other RAM devices Monolithic reliability and therefore, it can be used as a drop-in replacement for a True surface mount solution, no rework steps standard SRAM in a system. Minimum read and write cycle times Superior for moisture, shock, and vibration are equal. The F-RAM memory is nonvolatile due to its unique Resistant to negative voltage undershoots ferroelectric memory process. These features make the FM16W08 ideal for nonvolatile memory applications requiring Low power consumption frequent or rapid writes. Active current 12 mA (max) The device is available in a 28-pin SOIC surface mount package. Standby current 20 A (typ) Device specifications are guaranteed over the industrial Wide voltage operation: V = 2.7 V to 5.5 V temperature range 40 C to +85 C. DD For a complete list of related documentation, click here. Logic Block Diagram A 12-0 A 12-0 8 K x 8 F-RAM Array CE Control DQ WE Logic 7-0 I/O Latch & Bus Driver OE Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-86210 Rev. *F Revised September 8, 2015 Address Latch and DecoderFM16W08 Contents Pinout ................................................................................3 SRAM Write Cycle ..................................................... 10 Pin Definitions ..................................................................3 Power Cycle Timing ....................................................... 12 Device Operation ..............................................................4 Functional Truth Table ................................................... 13 Memory Architecture ...................................................4 Ordering Information ...................................................... 14 Memory Operation .......................................................4 Ordering Code Definitions ......................................... 14 Read Operation ...........................................................4 Package Diagram ............................................................ 15 Write Operation ...........................................................4 Acronyms ........................................................................16 Pre-charge Operation ..................................................4 Document Conventions ................................................. 16 Endurance .........................................................................4 Units of Measure ....................................................... 16 F-RAM Design Considerations ........................................5 Document History Page ................................................. 17 Maximum Ratings .............................................................7 Sales, Solutions, and Legal Information ...................... 18 Operating Range ...............................................................7 Worldwide Sales and Design Support ....................... 18 DC Electrical Characteristics ..........................................7 Products ....................................................................18 Data Retention and Endurance .......................................7 PSoC Solutions ...................................................... 18 Capacitance ......................................................................8 Cypress Developer Community ................................. 18 Thermal Resistance ..........................................................8 Technical Support ..................................................... 18 AC Test Conditions ..........................................................8 AC Switching Characteristics .........................................9 SRAM Read Cycle ......................................................9 Document Number: 001-86210 Rev. *F Page 2 of 18