CY8C20xx7/S 1.8 V CapSense Controller with SmartSense Auto-tuning 31 Buttons, 6 Sliders, Proximity Sensors 1.8 V CapSense Controller with SmartSense Auto-tuning 31 Buttons, 6 Sliders, Proximity Sensors 4 Clock Sources Features Internal main oscillator (IMO): 6/12/24 MHz QuietZone Controller Internal low-speed oscillator (ILO) at 32 kHz for watchdog and sleep timers Patented Capacitive Sigma Delta PLUS (CSD PLUS) sensing algorithm for robust performance External 32 KHz Crystal Oscillator High Sensitivity (0.1 pF) and best-in-class SNR performance External Clock Input to support: Programmable pin configurations Overlay thickness of 15 mm for glass and 5 mm plastic Up to 34 general-purpose I/Os (GPIOs) Proximity Solutions Dual mode GPIO (Analog and Digital) Superior noise immunity performance against conducted and High sink current of 25 mA per GPIO radiated noise and ultra low radiated emissions Max sink current 120 mA for all I/Os combined Standardized user modules for overcoming noise Source Current Low power CapSense block with SmartSense Auto-tuning 5 mA on ports 0 and 1 Low average power consumption 1 mA on ports 2, 3 and 4 28 A/sensor in run time (wake-up and scan once every Configurable internal pull-up, high-Z and open drain modes 125 ms) Selectable, regulated digital I/O on port 1 SmartSense EMC PLUS Auto-Tuning Configurable input threshold on port 1 Sets and maintains optimal sensor performance during run Versatile Analog functions time Internal analog bus supports connection of multiple sensors Eliminates system tuning during development and to form ganged proximity sensor production Internal Low-Dropout voltage regulator for high power supply Compensates for variations in manufacturing process rejection ratio (PSRR) Driven shield available on five GPIO pins Additional system resources Delivers best-in class water tolerant designs 2 I C Slave: Robust proximity sensing in the presence of metal objects Selectable to 50 kHz, 100 kHz, or 400 kHz Supports longer trace lengths Selectable Clock stretch or Forced Nack Mode Max load of 100 pF (3 MHz) 2 I C wake from sleep with Hardware address match Powerful Harvard-architecture processor 12 MHz (Configurable) SPI master and slave M8C CPU with a max speed of 24 MHz Three 16-bit timers Watchdog and sleep timers Operating Range: 1.71 V to 5.5 V Integrated supervisory circuit Standby Mode 1.1 A (Typ) 10-bit incremental analog-to-digital converter (ADC) with Deep Sleep 0.1 A (Typ) internal voltage reference o o Operating Temperature range: 40 C to +85 C Two general-purpose high speed, low power analog comparators Flexible on-chip memory Complete development tools 8 KB flash, 1 KB SRAM 16 KB flash, 2 KB SRAM Free development tool (PSoC Designer) 32 KB flash, 2 KB SRAM Sensor and Package options 50,000 flash erase/write cycles 10 Sensing Inputs 16-pin QFN, 16-pin SOIC Read while Write with EEPROM emulation 16 Sensing Inputs 24-pin QFN In-system programming simplifies manufacturing process 24 Sensing Inputs 30-pin WLCSP 25 Sensing Inputs 32-pin QFN 31 Sensing Inputs 48-pin QFN Errata: For information on silicon errata, see Errata on page 38. Details include trigger conditions, devices affected, and proposed workaround. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-69257 Rev. *Q Revised May 11, 2018CY8C20xx7/S Logic Block Diagram 1.8/2.5/3 V PWRSYS 1 Port 4 Port 3 Port 2 Port 1 Port 0 LDO (Regulator) PSoC CORE SYSTEM BUS Global Analog Interconnect 1K/2K 8K/16K/ 32K Flash Supervisory ROM (SROM) SRAM Nonvolatile Memory Interrupt Sleep and Controller CPU Core (M8C) Watchdog 6/12/24 MHz Internal Main Oscillator Internal Low Speed Oscillator (ILO) (IMO) Multiple Clock Sources CAPSENSE Analog Reference SYSTEM CapSense Comparator 1 Module Analog Mux Comparator 2 SYSTEM BUS Internal POR SPI Three 16-Bit I2C System Digital Voltage and Master/ Programmable Slave Resets Clocks References LVD Slave Timers SYSTEM RESOURCES Note 1. Internal voltage regulator for internal circuitry Document Number: 001-69257 Rev. *Q Page 2 of 46