CY2DP1510 1:10 LVPECL Fanout Buffer with Selectable Clock Input 1:10 LVPECL Fanout Buffer with Selectable Clock Input 1 2.5-V or 3.3-V operating voltage Features Commercial and industrial operating temperature range Select one of two differential (LVPECL, LVDS, HCSL, or CML) input pairs to distribute to 10 LVPECL output pairs Functional Description Translates any single-ended input signal to 3.3 V LVPECL The CY2DP1510 is an ultra-low noise, low skew, levels with resistor bias on INx input low-propagation delay 1:10 LVPECL fanout buffer targeted to 40-ps maximum output-to-output skew meet the requirements of high-speed clock distribution applications. The CY2DP1510 can select between two separate 600-ps maximum propagation delay differential (LVPECL, LVDS, HCSL, or CML) input clock pairs 0.11-ps maximum additive RMS phase jitter at 156.25 MHz using the IN SEL pin. The device has a fully differential internal (12-kHz to 20-MHz offset) architecture that is optimized to achieve low additive jitter and low skew at operating frequencies of up to 1.5 GHz. Up to 1.5-GHz operation For a complete list of related documentation, click here. 32-pin thin quad flat pack (TQFP) package Logic Block Diagram Note 1. Input AC-coupling capacitors are required for voltage-translation applications. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-55566 Rev. *Q Revised May 18, 2016CY2DP1510 Contents Pin Configuration .............................................................3 Acronyms ........................................................................13 Pin Definitions ..................................................................3 Document Conventions .................................................13 Absolute Maximum Ratings ............................................4 Units of Measure .......................................................13 Operating Conditions .......................................................4 Document History Page .................................................14 DC Electrical Specifications ............................................5 Sales, Solutions, and Legal Information ......................16 Thermal Resistance ..........................................................5 Worldwide Sales and Design Support .......................16 AC Electrical Specifications ............................................6 Products ....................................................................16 Switching Waveforms ......................................................8 PSoCSolutions ........................................................16 Application Information .................................................10 Cypress Developer Community .................................16 Ordering Information ......................................................11 Technical Support ......................................................16 Ordering Code Definitions .........................................11 Package Diagram ............................................................12 Document Number: 001-55566 Rev. *Q Page 2 of 16