Product Information

CY2547QIT

CY2547QIT electronic component of Infineon

Datasheet
Clock Generators & Support Products PREMIS SSCG EMI Reduction

Manufacturer: Infineon
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (AUD)

2500: AUD 15.7054 ( AUD 17.28 Inc GST) ea
Line Total: AUD 39263.5 ( AUD 43189.85 Inc GST)

0 - Global Stock
MOQ: 2500  Multiples: 2500
Pack Size: 2500
Availability Price Quantity
0 - Global Stock


Ships to you between Mon. 22 Jul to Fri. 26 Jul

MOQ : 2500
Multiples : 2500

Stock Image

CY2547QIT
Infineon

2500 : AUD 15.7054

0 - Global Stock


Ships to you between Fri. 26 Jul to Tue. 30 Jul

MOQ : 2500
Multiples : 2500

Stock Image

CY2547QIT
Infineon

2500 : AUD 19.6385
5000 : AUD 19.0369

     
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Product Category
RoHS - XON
Icon ROHS
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Brand
Moisture Sensitive
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Notes:- Show Stocked Products With Similar Attributes.

CY2545/CY2547 Quad-PLL Programmable Spread Spectrum 2 Clock Generator with Serial I C Interface Quad-PLL Programmable Spread Spectrum Clock Generator with Serial I2C Interface 24-pin QFN package Features Commercial and industrial temperature ranges Four fully-integrated phase-locked loops (PLLs) One-time programmability Input frequency range For programming support, contact Cypress technical support External crystal: 8 to 48 MHz or send an e-mail to clocks cypress.com External reference: 8 to 166 MHz clock Benefits Wide operating output frequency range 3 to 166 MHz Multiple high-performance PLLs allow synthesis of unrelated 2 frequencies Serial programmable over two-wire I C interface Nonvolatile programming for personalization of PLL Programmable spread spectrum with center and down spread frequencies, spread spectrum characteristics, drive strength, option and Lexmark and Linear modulation profiles crystal load capacitance, and output frequencies V supply voltage options: DD Application-specific programmable EMI reduction using spread 2.5 V, 3.0 V, and 3.3 V for CY2545 spectrum for clocks 1.8 V for CY2547 Programmable PLLs for system frequency margin tests Selectable output clock voltages independent of V supply: DD 1.8 V, 2.5 V, 3.0 V, and 3.3 V for CY2545 Meets critical timing requirements in complex system designs 1.8 V for CY2547 Suitability for PC, consumer, portable, and networking Power-down, output enable, or frequency select features applications Low jitter, high accuracy outputs Capable of zero PPM frequency synthesis error Ability to synthesize nonstandard frequencies with Fractional-N Uninterrupted system operation during clock frequency switch capability Application compatibility in standard and low-power systems Up to eight clock outputs with programmable drive strength Functional Description Glitch-free outputs while frequency switching For a complete list of related documentation, click here. Logic Block Diagram CLKIN/RST Crossbar CLK1 XIN/ Switch Bank CLK2 EXCLKIN 1 Output OSC PLL1 XOUT Dividers CLK3 and Bank CLK4 Drive 2 PLL2 Strength CLK5 MUX Control CLK6 and FS Control Bank CLK7 Logic 3 PLL3 CLK8 (SS) SCL PLL4 I2C SDA (SS) PD /OE SSON Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-13196 Rev. *I Revised November 2, 2017CY2545/CY2547 Contents Pinouts ..............................................................................3 Read Operations ............................................................. 11 Pin Definitions ..................................................................4 Current Address Read ............................................... 11 Pinouts ..............................................................................5 Random Read ........................................................... 11 Pin Definitions ..................................................................6 Sequential Read ........................................................ 11 Functional Overview ........................................................7 Serial I2C Programming Interface Four Configurable PLLs ..............................................7 Timing Specifications .................................................... 11 I2C Programming ........................................................7 Absolute Maximum Conditions ..................................... 12 Input Reference Clocks ...............................................7 Recommended Operating Conditions .......................... 12 Multiple Power Supplies ..............................................7 DC Electrical Specifications .......................................... 13 Output Bank Settings ..................................................7 AC Electrical Specifications .......................................... 14 Output Source Selection .............................................7 Configuration Example .................................................. 14 Spread Spectrum Control ............................................7 Recommended Crystal Specification ........................... 15 Frequency Select ........................................................7 Recommended Crystal Specification ........................... 15 Glitch-Free Frequency Switch .....................................7 Test and Measurement Setup ........................................ 16 Device Reset Function ................................................7 Voltage and Timing Definitions ..................................... 16 PD /OE Mode .............................................................7 Ordering Information ...................................................... 17 Keep Alive Mode .........................................................7 Possible Configurations ............................................. 17 Output Drive Strength ..................................................8 Ordering Code Definitions ......................................... 17 Generic Configuration and Custom Frequency ...........8 Package Diagram ............................................................ 18 Output Driver Supply Acronyms ........................................................................ 19 and Multi-Function Input Restriction ...................................8 Document Conventions ................................................. 19 Serial I2C Programming Interface Units of Measure ....................................................... 19 Protocol and Timing .........................................................9 Document History Page ................................................. 20 Device Address .........................................................10 Sales, Solutions, and Legal Information ...................... 22 Data Valid ..................................................................10 Worldwide Sales and Design Support ....................... 22 Data Frame ...............................................................10 Products .................................................................... 22 Acknowledge Pulse ...................................................10 PSoC Solutions ...................................................... 22 Write Operations .............................................................11 Cypress Developer Community ................................. 22 Writing Individual Bytes .............................................11 Technical Support ..................................................... 22 Writing Multiple Bytes ................................................11 Document Number: 001-13196 Rev. *I Page 2 of 22

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

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