Product Information

CY22801KFXI

CY22801KFXI electronic component of Infineon

Datasheet
Clock Generators & Support Products Prog Clk Gen 1MHz-133MHz

Manufacturer: Infineon
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (AUD)

1: AUD 17.177 ( AUD 18.89 Inc GST) ea
Line Total: AUD 17.177 ( AUD 18.89 Inc GST)

209 - Global Stock
Ships to you between
Fri. 26 Jul to Tue. 30 Jul
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
209 - Global Stock


Ships to you between Fri. 26 Jul to Tue. 30 Jul

MOQ : 1
Multiples : 1

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CY22801KFXI
Infineon

1 : AUD 16.6485
10 : AUD 15.3215
25 : AUD 14.5962
100 : AUD 13.0392
250 : AUD 12.4554
500 : AUD 11.4823
970 : AUD 10.4385
2910 : AUD 10.4385
5820 : AUD 10.12

     
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CY22801 Universal Programmable Clock Generator (UPCG) Universal Programmable Clock Generator (UPCG) Features Functional Description Integrated phase-locked loop (PLL) The CY22801 is a flash-programmable clock generator that supports various applications in consumer and communications Field-Programmable markets. The device uses the Cypress-proprietary PLL along with Spread Spectrum and VCXO technology to make it one of Input frequency range: the most versatile clock synthesizers in the market. The device Crystal: 8 MHz to 30 MHz uses a Cypress-proprietary PLL to drive up to three configurable CLKIN: 1 MHz to 133 MHz outputs in an 8-pin SOIC. Low-voltage complementary metal oxide semiconductor The CY22801 is programmed with an easy-to-use programmer (LVCMOS) output frequency: dongle, the CY36800, in conjunction with the CyClocksRT Up to 200 MHz (commercial grade) software. This enables fast sample generation of prototype Up to 166.6 MHz (industrial grade) builds for user-defined frequencies. Cypresss value-added distribution partners and third-party programming systems from Special Features: BP Microsystems, HiLo Systems, and others, can also be Spread Spectrum contacted for large production quantities. A JEDEC file needs to VCXO be configured to program CY22801, which can be generated Inputs: PD or OE, FS using the CyClocksRT software. Low-jitter, high-accuracy outputs For a complete list of related documentation, click here. 3.3 V operation Commercial and industrial temperature ranges 8-pin small-outline integrated circuit (SOIC) package Serial interface for device configuration Logic Block Diagram XIN/CLKIN VCXO Divider REF PLL XOUT CLKA with Logic 1 SDAT/FS0/ VCXO VCXO/OE /PD CLKB/ Switch FS1/ Serial I/F Matrix FS2 SCLK SCLK with /FS1 SDAT Control Divider CLKC /FS0 /PD /FS2 2 Logic OE Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-15571 Rev. *M Revised January 3, 2018 CY22801 Contents Pin Configurations ...........................................................3 CyClocksRT Software .................................................... 12 Pin Definitions ..................................................................3 Possible Configuration Examples ................................12 External Reference Crystal/Clock Input .........................4 Informational Graphs ..................................................... 13 Output Clock Frequencies ...............................................4 Absolute Maximum Conditions ..................................... 14 VCXO .................................................................................4 Recommended Operating Conditions .......................... 14 VCXO Profile ...............................................................4 Recommended Crystal Specifications Spread Spectrum Clock Generation (SSCG) .................4 for non-VCXO Applications ........................................... 14 Spread Percentage .....................................................4 Pullable Crystal Specifications Modulation Frequency .................................................4 for VCXO Application only ............................................. 14 SSON Pin ....................................................................4 DC Electrical Specifications .......................................... 15 Multifunction Pins ............................................................5 AC Electrical Characteristics ........................................ 16 Frequency Calculation and Register Definitions ...........5 Test Circuit ...................................................................... 17 Default Startup Condition for the CY22801 ....................6 Timing Definitions .......................................................... 17 Frequency Calculations and Register Definitions 2-wire Serial (I2C) Interface Timing ............................... 18 using the Serial (I2C) Interface ........................................6 Data Valid .................................................................. 18 Reference Frequency ..................................................6 Data Frame ............................................................... 18 Programmable Crystal Input Oscillator Acknowledge Pulse ................................................... 18 Gain Settings ......................................................................6 Ordering Information ...................................................... 20 Using an External Clock as the Reference Input .........7 Possible Configurations ............................................. 20 Input Load Capacitors .................................................8 Ordering Code Definitions ......................................... 20 PLL Frequency, Q Counter 42H(6..0) .......................8 Package Diagram ............................................................ 21 PLL Frequency, P Counter Acronyms ........................................................................ 22 40H(1..0) , 41H(7..0) , 42H(7) .........................................9 Document Conventions ................................................. 22 PLL Post Divider Options 0CH(7..0) , 47H(7..0) .......9 Units of Measure ....................................................... 22 Charge Pump Settings 40H(2..0) ..............................9 Document History Page ................................................. 23 Clock Output Settings: CLKSRC Sales, Solutions, and Legal Information ...................... 26 Clock Output Crosspoint Switch Matrix Worldwide Sales and Design Support ....................... 26 44H(7..0) , 45H(7..0) , 46H(7..6) ...................................10 Products .................................................................... 26 Test, Reserved, and Blank Registers ........................10 PSoC Solutions ...................................................... 26 Application Guideline .....................................................12 Cypress Developer Community ................................. 26 Best Practices for Best Jitter Performance ................12 Technical Support ..................................................... 26 Field Programming the CY22801 ..................................12 Document Number: 001-15571 Rev. *M Page 2 of 26

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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