CY14B104LA, CY14B104NA 4-Mbit (512 K 8/256 K 16) nvSRAM 4-Mbit (512 K 8/256 K 16) nvSRAM Packages Features 44-/54-pin thin small outline package (TSOP) Type II 20 ns, 25 ns, and 45 ns access times 48-ball fine-pitch ball grid array (FBGA) Internally organized as 512 K 8 (CY14B104LA) or 256 K 16 Pb-free and restriction of hazardous substances (RoHS) (CY14B104NA) compliant Hands off automatic STORE on power-down with only a small Functional Description capacitor The Cypress CY14B104LA/CY14B104NA is a fast static RAM STORE to QuantumTrap non-volatile elements initiated by (SRAM), with a non-volatile element in each memory cell. The software, device pin, or AutoStore on power-down memory is organized as 512 K bytes of 8 bits each or 256 K RECALL to SRAM initiated by software or power-up words of 16-bits each. The embedded non-volatile elements incorporate QuantumTrap technology, producing the worlds Infinite read, write, and recall cycles most reliable non-volatile memory. The SRAM provides infinite 1 million STORE cycles to QuantumTrap read and write cycles, while independent non-volatile data resides in the highly reliable QuantumTrap cell. Data transfers 20 year data retention from the SRAM to the non-volatile elements (the STORE operation) takes place automatically at power-down. On Single 3 V +20, 10 operation power-up, data is restored to the SRAM (the RECALL operation) Industrial temperature from the non-volatile memory. Both the STORE and RECALL operations are also available under software control. For a complete list of related documentation, click here. 1, 2, 3 V Logic Block Diagram V CC CAP Quatrum Trap 2048 X 2048 A POWER 0 R CONTROL A STORE 1 O A 2 W RECALL A 3 STORE/RECALL A D 4 HSB CONTROL E STATIC RAM A 5 C ARRAY A 6 O 2048 X 2048 A 7 SOFTWARE D A A - A 8 14 2 DETECT E A 17 R A 18 DQ 0 DQ 1 DQ 2 DQ 3 I DQ 4 N DQ P 5 U DQ 6 T DQ B 7 COLUMN I/O U DQ 8 F DQ F 9 E OE DQ 10 COLUMN DEC R WE DQ 11 S DQ 12 DQ 13 CE DQ 14 BLE A A A A A A A A 9 10 11 12 13 14 15 16 DQ 15 BHE Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-49918 Rev. *N Revised November 6, 2014CY14B104LA, CY14B104NA Contents Pinouts ..............................................................................3 Switching Waveforms .................................................... 11 Pin Definitions ..................................................................4 AutoStore/Power-Up RECALL ....................................... 14 Device Operation ..............................................................5 Switching Waveforms SRAM Read ................................................................5 AutoStore/Power-up RECALL ....................................... 14 SRAM Write .................................................................5 Software Controlled STORE/RECALL Cycle ................ 15 AutoStore Operation ....................................................5 Switching Waveforms Hardware STORE Operation .......................................5 Software Controlled STORE/RECALL Cycle ................ 15 Hardware RECALL (Power-Up) ..................................6 Hardware STORE Cycle ................................................. 16 Software STORE .........................................................6 Switching Waveforms Hardware STORE Cycle ........ 16 Software RECALL .......................................................6 Truth Table For SRAM Operations ................................ 17 Preventing AutoStore ..................................................7 Ordering Information ...................................................... 18 Data Protection ............................................................7 Ordering Code Definitions ......................................... 19 Maximum Ratings .............................................................8 Package Diagrams .......................................................... 20 Operating Range ...............................................................8 Acronyms ........................................................................23 DC Electrical Characteristics ..........................................8 Document Conventions ................................................. 23 Data Retention and Endurance .......................................9 Units of Measure ....................................................... 23 Capacitance ......................................................................9 Document History Page ................................................. 24 Thermal Resistance ..........................................................9 Sales, Solutions, and Legal Information ...................... 26 AC Test Loads ................................................................10 Worldwide Sales and Design Support ....................... 26 AC Test Conditions ........................................................10 Products ....................................................................26 AC Switching Characteristics .......................................11 PSoC Solutions ......................................................... 26 Notes 1. Address A A for 8 configuration and Address A A for 16 configuration. 0 18 0 17 2. Data DQ DQ for 8 configuration and Data DQ DQ for 16 configuration. 0 7 0 15 3. BHE and BLE are applicable for 16 configuration only. Document Number: 001-49918 Rev. *N Page 2 of 26