Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as Cypress document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document. Future revisions will occur when appropriate, and any changes will be set out on the document history page. Continuity of ordering part numbers Infineon continues to support existing part numbers. Please continue to use the ordering part numbers listed in the datasheet for ordering. www.infineon.comCY14C101Q CY14B101Q CY14E101Q 1-Mbit (128K 8) Serial (SPI) nvSRAM 1-Mbit (128K 8) Serial (SPI) nvSRAM Industry standard configurations Features Operating voltages: 1-Mbit nonvolatile static random access memory (nvSRAM) CY14C101Q: V = 2.4 V to 2.6 V CC internally organized as 128K 8 CY14B101Q: V = 2.7 V to 3.6 V CC STORE to QuantumTrap nonvolatile elements initiated CY14E101Q: V = 4.5 V to 5.5 V CC automatically on power-down (AutoStore) or by using SPI Industrial temperature instruction (Software STORE) or HSB pin (Hardware 8- and 16-pin small outline integrated circuit (SOIC) package STORE) Restriction of hazardous substances (RoHS) compliant RECALL to SRAM initiated on power-up (Power-Up RECALL) or by SPI instruction (Software RECALL) Functional Description Support automatic STORE on power-down with a small capacitor (except for CY14X101Q1A) The Cypress CY14X101Q combines a 1-Mbit nvSRAM with a nonvolatile element in each memory cell with serial SPI interface. High reliability The memory is organized as 128K words of 8 bits each. The Infinite read, write, and RECALL cycles embedded nonvolatile elements incorporate the QuantumTrap 1million STORE cycles to QuantumTrap technology, creating the worlds most reliable nonvolatile Data retention: 20 years at 85 C memory. The SRAM provides infinite read and write cycles, while 40 MHz, and 104 MHz High-speed serial peripheral interface the QuantumTrap cells provide highly reliable nonvolatile (SPI) storage of data. Data transfers from SRAM to the nonvolatile elements (STORE operation) takes place automatically at 40-MHz clock rate SPI write and read with zero cycle delay power-down (except for CY14X101Q1A). On power-up, data is 104-MHz clock rate SPI write and SPI read (with special fast restored to the SRAM from the nonvolatile memory (RECALL read instructions) operation). You can also initiate the STORE and RECALL Supports SPI mode 0 (0, 0) and mode 3 (1, 1) operations through SPI instruction. SPI access to special functions For a complete list of related documentation, click here. Nonvolatile STORE/RECALL 8-byte serial number Manufacturer ID and Product ID Configuration Sleep mode Write protection Feature CY14X101Q1A CY14X101Q2A CY14X101Q3A Hardware protection using Write Protect (WP) pin AutoStore No Yes Yes Software protection using Write Disable instruction Software Yes Yes Yes Software block protection for 1/4, 1/2, or entire array STORE Low power consumption Hardware No No Yes Average active current of 3 mA at 40 MHz operation STORE Average standby mode current of 150 A Sleep mode current of 8 A Logic Block Diagram Serial Number 8 x 8 Manufacturer ID / Status Register Product ID QuantumTrap 128 K x 8 WRSR/RDSR/WREN STORE RDSN/WRSN/RDID SI SRAM Memory RECALL 128 K x 8 READ/WRITE CS SPI Control Logic Data & Address Write Protection STORE/RECALL/ASENB/ASDISB Control SCK Instruction decoder WP SO V CC SLEEP Power Control Block V CAP Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-54393 Rev. *N Revised August 9, 2018