Product Information

CE3521M4-C2

CE3521M4-C2 electronic component of CEL

Datasheet
RF JFET Transistors 20GHz NF .70dB Ga 11.9dB -55C +125C

Manufacturer: CEL
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (AUD)

1: AUD 1.2606 ( AUD 1.39 Inc GST) ea
Line Total: AUD 1.2606 ( AUD 1.39 Inc GST)

15323 - Global Stock
Ships to you between
Thu. 11 Jul to Wed. 17 Jul
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
15323 - Global Stock


Ships to you between Thu. 11 Jul to Wed. 17 Jul

MOQ : 1
Multiples : 1
1 : AUD 1.2606
10 : AUD 1.2424
25 : AUD 1.2239
50 : AUD 1.2056
100 : AUD 1.1873
250 : AUD 1.1691
500 : AUD 1.1506
1000 : AUD 1.1323
3000 : AUD 1.114
6000 : AUD 1.0958
15000 : AUD 1.0775

15323 - Global Stock


Ships to you between Thu. 11 Jul to Wed. 17 Jul

MOQ : 12
Multiples : 1
12 : AUD 1.2424
25 : AUD 1.2239
50 : AUD 1.2056
100 : AUD 1.1873
250 : AUD 1.1691
500 : AUD 1.1506
1000 : AUD 1.1323
3000 : AUD 1.114
6000 : AUD 1.0958
15000 : AUD 1.0775

     
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Product Category
RoHS - XON
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Notes:- Show Stocked Products With Similar Attributes.

RF Low Noise FET CE3521M4 20 GHz Low Noise FET in Dual Mold Plastic PKG Enter a Short Document/Title Name Here DESCRIPTION PACKAGE Low Noise and High Gain Flat-lead 4-pin thin-type super minimold package Original Dual Mold Plastic package FEATURES Low noise figure and high associated gain: NF = 0.70 dB TYP., Ga = 11.9 dB TYP. V = 2 V, I = 10 mA, f = 20 GHz DS D APPLICATIONS DBS LNB gain-stage, Mix-stage Low noise amplifier for microwave communication systems ORDERING INFORMATION Part Number Order Number Package Marking Description CE3521M4 CE3521M4-C2 Flat-lead 4-pin C04 Embossed tape 8 mm wide thin-type super Pin 1 (source), Pin 2 (drain) minimold face the perforation side of package the tape MOQ 15 kpcs/reel This document is subject to change without notice. Date Published: July 2016 CDS-0020-04 (Issue A) 1 CE3521M4 PIN CONFIGURATION AND INTERNAL BLOCK DIAGRAM Pin No. Pin Name 1 Source 2 Drain 3 Source 4 Gate ABSOLUTE MAXIMUM RATINGS (TA = +25C, unless otherwise specified) Parameter Symbol Rating Unit Drain to Source Voltage V 4.0 V DS Gate to Source Voltage V -3.0 V GS Drain Current I I mA D DSS Gate Current I 80 A G Total Power Dissipation P 125 mW tot C Channel Temperature T +150 ch Storage Temperature T -55 to +125 C stg Note C Operation Temperature T -55 to +125 op Note Refer to Total Power Dissipation vs. Ambient Temperature graph on page 4 RECOMMENDED OPERATING RANGE (TA = +25C, unless otherwise specified) Parameter Symbol MIN. TYP. MAX. Unit Drain to Source Voltage V +1 +2 +3 V DS Drain Current I 5 10 15 mA D This document is subject to change without notice. 2

Tariff Desc

8541.21.00 16 No - - With a dissipation rate of less than 1 W Free

DIODES, TRANSISTORS AND SIMILAR SEMICONDUCTOR DEVICES; PHOTOSENSITIVE SEMICONDUCTOR DEVICES,
California Eastern Laboratories
CALIFORNIA MICRO DEV

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