Product Information

CE3520K3

CE3520K3 electronic component of CEL

Datasheet
RF JFET Transistors 20GHz NF .55dB Ga 13.8dB -55C +125C

Manufacturer: CEL
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (AUD)

1: AUD 4.4423 ( AUD 4.89 Inc GST) ea
Line Total: AUD 4.4423 ( AUD 4.89 Inc GST)

601 - Global Stock
Ships to you between
Thu. 18 Jul to Mon. 22 Jul
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
80 - Global Stock


Ships to you between Thu. 18 Jul to Mon. 22 Jul

MOQ : 1
Multiples : 1
1 : AUD 3.5915
10 : AUD 3.0608
100 : AUD 2.5123
250 : AUD 1.9285
500 : AUD 1.8754
1000 : AUD 1.8754
2500 : AUD 1.84
5000 : AUD 1.8046
10000 : AUD 1.7639

     
Manufacturer
Product Category
RoHS - XON
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Technology
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Cnhts
Hts Code
Mxhts
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Notes:- Show Stocked Products With Similar Attributes.

DATASHEET RF Low Noise FET CE3520K3 20 / 24 GHz Super Low Noise FET in Hollow Plastic PKG DESCRIPTION PACKAGE Super Low Noise and High Gain Micro-X plastic package Hollow (Air cavity) Plastic package FEATURES Super Low noise figure and high associated gain: NF = 0.55 dB TYP., Ga = 13.8 dB TYP. V = 2 V, I = 10 mA, f = 20 GHz DS D NF = 0.80 dB TYP., Ga = 13.9 dB TYP. VDS = 2 V, ID = 10 mA, f = 24 GHz APPLICATIONS K-Band LNB (Low Noise Block) Doppler Sensor Low Noise Amplifier for microwave communication systems ORDERING INFORMATION Part Number Order Number Package Marking Description CE3520K3 CE3520K3-C1 Micro-X plastic C6 Embossed tape 8 mm wide package Pin 4 (Gate) faces the perforation side of the tape MOQ 10k pcs/reel This document is subject to change without notice. Date Published: July 2019 CDS-0019-04 (Issue C) 1 CE3520K3 PIN CONFIGURATION AND INTERNAL BLOCK DIAGRAM Pin No. Pin Name 1 Source 2 Drain 3 Source 4 Gate ABSOLUTE MAXIMUM RATINGS A (T = +25C, unless otherwise specified) Parameter Symbol Rating Unit V Drain to Source Voltage 4.0 V DS Gate to Source Voltage V -3.0 V GS Drain Current I I mA D DSS Gate Current IG 80 A P Total Power Dissipation 125 mW tot Channel Temperature T +150 C ch Storage Temperature T -55 to +125 C stg Note C Operation Temperature T -55 to +125 op Note Refer to Total Power Dissipation vs. Ambient Temperature graph on page 4 RECOMMENDED OPERATING RANGE (TA = +25C, unless otherwise specified) Parameter Symbol MIN. TYP. MAX. Unit Drain to Source Voltage V +1 +2 +3 V DS Drain Current ID 5 10 15 mA This document is subject to change without notice. 2

Tariff Desc

8541.21.00 16 No - - With a dissipation rate of less than 1 W Free

DIODES, TRANSISTORS AND SIMILAR SEMICONDUCTOR DEVICES; PHOTOSENSITIVE SEMICONDUCTOR DEVICES,
California Eastern Laboratories
CALIFORNIA MICRO DEV

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