AFBR-5805Z/5805TZ/5805AZ/5805ATZ ATM Transceivers for SONET OC-3 / SDH STM-1 in Low Cost 1 x 9 Package Style Data Sheet Description Features Full compliance with ATM forum UNI SONET OC-3 mul- The AFBR-5800Z family of trans ceivers from Avago Tech- timode fi ber physical layer specifi cation nologies provide the system designer with products Multisourced 1 x 9 package style with choice of duplex to implement a range of solutions for multimode fi ber SC or duplex ST* receptacle SONET OC-3 (SDH STM-1) physical layers for ATM and other services. Wave solder and aqueous wash process compatibility Manufactured in an ISO 9002 certifi ed facility The transceivers are all supplied in the industry standard Single +3.3 V or +5.0 V power supply 1 x 9 SIP package style with either a duplex SC or a duplex RoHS Compliance ST* connector interface. Applications ATM 2 km Backbone Links Multimode fi ber ATM backbone links The AFBR-5805Z/-5805TZ are 1300 nm products with Multimode fi ber ATM wiring closet to desktop links optical performance compliant with the SONET STS-3c (OC-3) Physical Layer Interface Specifi cation. This physical layer is defi ned in the ATM Forum User-Network Inter face (UNI) Specifi cation Version 3.0. This document references the ANSI T1E1.2 specifi cation for the details of the inter- face for 2 km multimode fi ber backbone links. The ATM 100 Mb/s-125 MBd Physical Layer interface is best implemented with the AFBR-5803 family of Fast Eth- ernet and FDDI Transceiv ers which are specifi ed for use in this 4B/5B encoded physical layer per the FDDI PMD stan- dard.Transmitter Sections and pin out are compliant with the multi source defi nition The transmitter section of the AFBR-5803Z and AFBR- of the 1 x 9 SIP. The low profi le of the Avago Technologies 5805Z series utilize 1300 nm InGaAsP LEDs. These LEDs transceiver design complies with the maximum height are packaged in the optical subassembly portion of the allowed for the duplex SC connector over the entire transmitter section. They are driven by a custom silicon IC length of the package. which converts diff erential PECL logic signals, ECL refer- enced (shifted) to a +3.3 V or +5.0 V supply, into an analog The optical subassemblies utilize a high volume assem- LED drive current. bly process together with low cost lens elements which result in a cost eff ective building block. Receiver Sections The electrical subassembly con sists of a high volume The receiver section of the AFBR-5803Z and AFBR- multilayer printed circuit board on which the IC chips and 5805Z series utilize InGaAs PIN photo diodes coupled to various surface-mounted passive circuit elements are at- a custom silicon transimpedance preampli fi er IC. These tached. are packaged in the optical subassem bly portion of the The package includes internal shields for the electrical receiver. and optical subassemblies to ensure low EMI emissions These PIN/preamplifi er combina tions are coupled to and high immunity to external EMI fi elds. a custom quantizer IC which provides the fi nal pulse The outer housing including the duplex SC connector or shaping for the logic output and the Signal Detect func- the duplex ST ports is molded of fi lled nonconductive tion. The data output is dif-ferential. The signal detect plastic to provide mechanical strength and electrical iso- output is single-ended. Both data and signal detect lation. The solder posts of the Avago Technologies design outputs are PECL compat ible, ECL referenced (shifted) to are isolated from the circuit design of the transceiver a 3.3 V or +5.0 V power supply. and do not require connection to a ground plane on the Package circuit board. The overall package concept for the Avago Technologies The transceiver is attached to a printed circuit board with transceivers consists of three basic elements the two the nine signal pins and the two solder posts which exit optical subassemblies, an electrical subassembly and the the bottom of the housing. The two solder posts provide housing as illustrated in Figure 1a and Figure 1b. the primary mechanical strength to withstand the loads imposed on the trans ceiver by mating with duplex or The package outline drawing and pin out are shown in simplex SC or ST connectored fi ber cables. Figures 2a, 2b and 3. The details of this package outline ELECTRICAL SUBASSEMBLY DUPLEX SC RECEPTACLE DIFFERENTIAL DATA OUT PIN PHOTODIODE SINGLE-ENDED SIGNAL QUANTIZER IC DETECT OUT PREAMP IC OPTICAL SUBASSEMBLIES DIFFERENTIAL LED DATA IN DRIVER IC TOP VIEW Figure 1a. SC Connector Block Diagram 2