Product Information

OP27GS

OP27GS electronic component of Analog Devices

Datasheet
OP27GS LOW-NOISE PRECISION

Manufacturer: Analog Devices
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Price (AUD)

1: AUD 5.9478 ( AUD 6.54 Inc GST) ea
Line Total: AUD 5.9478 ( AUD 6.54 Inc GST)

20 - Global Stock
Ships to you by
Mon. 08 Jul
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
20 - Global Stock


Ships to you by Mon. 08 Jul

MOQ : 1
Multiples : 1

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OP27GS
Analog Devices

1 : AUD 5.9478
10 : AUD 5.3814
25 : AUD 4.2485
50 : AUD 3.682
100 : AUD 3.5404

     
Manufacturer
Product Category
Series
Number of Channels
GBP - Gain Bandwidth Product
SR - Slew Rate
CMRR - Common Mode Rejection Ratio
en - Input Voltage Noise Density
Ib - Input Bias Current
Vos - Input Offset Voltage
Supply Voltage - Max
Supply Voltage - Min
Operating Supply Current
Minimum Operating Temperature
Maximum Operating Temperature
Shutdown
Mounting Style
Packaging
Pd - Power Dissipation
Package / Case
Product
Brand
Psrr - Power Supply Rejection Ratio
Factory Pack Quantity :
Voltage Gain Db
LoadingGif

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Low Noise, Precision Operational Amplifier Data Sheet OP27 FEATURES PIN CONFIGURATIONS BAL Low noise: 80 nV p-p (0.1 Hz to 10 Hz), 3 nV/Hz Low drift: 0.2 V/C V+ BAL 1 OP27 High speed: 2.8 V/s slew rate, 8 MHz gain bandwidth IN 2 OUT Low V : 10 V OS CMRR: 126 dB at VCM of 11 V NC +IN 3 High open-loop gain: 1.8 million 4V (CASE) Available in die form NC = NO CONNECT GENERAL DESCRIPTION Figure 1. 8-Lead TO-99 (J-Suffix) The OP27 precision operational amplifier combines the low 1 8 V TRIM V TRIM offset and drift of the OP07 with both high speed and low noise. OS OS OP27 IN 2 7 V+ Offsets down to 25 V and maximum drift of 0.6 V/C make +IN 3 6 OUT the OP27 ideal for precision instrumentation applications. Low 4 5 V NC noise, en = 3.5 nV/Hz, at 10 Hz, a low 1/f noise corner frequency of 2.7 Hz, and high gain (1.8 million), allow accurate NC = NO CONNECT high-gain amplification of low-level signals. A gain bandwidth Figure 2. 8-Lead CERDIP Glass Hermetic Seal (Z-Suffix), product of 8 MHz and a 2.8 V/s slew rate provide excellent 8-Lead PDIP (P-Suffix), and 8-Lead SOIC (S-Suffix) dynamic accuracy in high speed, data-acquisition systems. A low input bias current of 10 nA is achieved by use of a bias current cancellation circuit. Over the military temperature range, this circuit typically holds I and I to 20 nA and 15 nA, B OS respectively. The output stage has good load driving capability. A guaranteed swing of 10 V into 600 and low output distortion make the OP27 an excellent choice for professional audio applications. (Continued on Page 3) FUNCTIONAL BLOCK DIAGRAM V+ C2 R3 R4 1 8 Q6 Q22 Q46 C1 V ADJ.. 1 OS 1 R23 R24 R1 R2 Q21 Q23 Q24 R9 Q20 Q19 Q1A Q1B Q2B Q2A R12 OUTPUT NONINVERTING C3 C4 R5 INPUT (+) Q3 Q26 INVERTING Q45 Q11 Q12 INPUT () Q27 Q28 1 R1 AND R2 ARE PERMANENTLY ADJUSTED AT WAFER TEST FOR MINIMUM OFFSET VOLTAGE V Figure 3. Rev. H Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 19812015 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 00317-001 00317-002 00317-003OP27 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................8 General Description ......................................................................... 1 Applications Information .............................................................. 14 Pin Configurations ........................................................................... 1 Offset Voltage Adjustment ........................................................ 14 Functional Block Diagram .............................................................. 1 Noise Measurements .................................................................. 14 Revision History ............................................................................... 2 Unity-Gain Buffer Applications ............................................... 14 Specifications ..................................................................................... 4 Comments On Noise ................................................................. 15 Electrical Characteristics ............................................................. 4 Audio Applications .................................................................... 16 Typical Electrical Characteristics ............................................... 6 References .................................................................................... 18 Absolute Maximum Ratings ............................................................ 7 Outline Dimensions ....................................................................... 19 Thermal Resistance ...................................................................... 7 Ordering Guide .......................................................................... 21 ESD Caution .................................................................................. 7 REVISION HISTORY 10/15Rev. G to Rev. H 1/03Rev. B to Rev. C Changes to Features Section and General Description Section ..... 1 Edits to Pin Connections .................................................................. 1 Changes to Note 1, Ordering Guide ................................................. 21 Edits to General Description ........................................................... 1 Edits to Die Characteristics .............................................................. 5 3/15Rev. F to Rev. G Edits to Absolute Maximum Ratings .............................................. 7 Changes to General Description Section ...................................... 3 Updated Outline Dimensions ....................................................... 16 Changes to Figure 31 ...................................................................... 12 Edits to Figure 8 .............................................................................. 14 Changes to Applications Information Section and Output Edits to Outline Dimensions......................................................... 16 Voltage Adjustment Section .......................................................... 14 Updated Outline Dimensions ....................................................... 19 9/01Rev. 0 to Rev. A Changes to Ordering Guide .......................................................... 21 Edits to Ordering Information ........................................................ 1 Edits to Pin Connections .................................................................. 1 5/06Rev. E to Rev. F Edits to Absolute Maximum Ratings .............................................. 2 Removed References to 745 .............................................. Universal Edits to Package Type ....................................................................... 2 Edits to Electrical Characteristics .............................................. 2, 3 Updated 741 to AD741 ...................................................... Universal Changes to Ordering Guide .......................................................... 20 Edits to Wafer Test Limits ................................................................ 4 Deleted Typical Electrical Characteristics...................................... 4 12/05Rev. D to Rev. E Edits to Burn-In Circuit Figure ....................................................... 7 Edits to Figure 2 ................................................................................ 1 Edits to Application Information .................................................... 8 9/05Rev. C to Rev. D Updated Format .................................................................. Universal Changes to Table 1 ............................................................................ 4 Removed Die Characteristics Figure ............................................. 5 Removed Wafer Test Limits Table .................................................. 5 Changes to Table 5 ............................................................................ 7 Changes to Comments on Noise Section .................................... 15 Changes to Ordering Guide .......................................................... 24 Rev. H Page 2 of 21

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8542.33.00 43 No -- Amplifiers

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