MAX9312/MAX9314 19-2079 Rev 2 4/09 Dual 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Drivers General Description Features The MAX9312/MAX9314 are low skew, dual 1-to-5 dif- +2.25V to +3.8V Differential HSTL/LVPECL ferential drivers designed for clock and data distribu- Operation tion. These devices accept two inputs. Each input is -2.25V to -3.8V Differential LVECL Operation reproduced at five differential outputs. The differential inputs can be adapted to accept single-ended inputs 30ps (typ) Part-to-Part Skew by connecting the on-chip V supply to one input as a BB 12ps (typ) Output-to-Output Skew reference voltage. 312ps (typ) Propagation Delay The MAX9312/MAX9314 feature low part-to-part skew (30ps) and output-to-output skew (12ps), making them 300mV Differential Output at 3GHz ideal for clock and data distribution across a backplane On-Chip Reference for Single-Ended Inputs or a board. For interfacing to differential HSTL and LVPECL signals, these devices operate over a +2.25V Output Low with Open Input to +3.8V supply range, allowing high-performance clock Pin Compatible with MC100LVEP210 (MAX9312) or data distribution in systems with a nominal +2.5V or and MC100EP210 (MAX9314) +3.3V supply. For differential LVECL operation, these devices operate from a -2.25V to -3.8V supply. Offered in Tiny QFN* Package (70% Smaller The MAX9312 features an on-chip V reference output BB Footprint than LQFP) of 1.425V below the positive supply voltage. The MAX9314 offers an on-chip V reference output of BB 1.32V below the positive supply voltage. Ordering Information Both devices are offered in an industry-standard 32-pin 7mm x 7mm LQFP package. In addition, the MAX9312 PART TEMP RANGE PIN-PACKAGE is offered in a space-saving 32-pin 5mm x 5mm TQFN MAX9312ECJ+ -40C to +85C 32 LQFP package. MAX9312ETJ+ -40C to +85C 32 TQFN-EP* Applications MAX9314ECJ -40C to +85C 32 LQFP *Exposed pad. Precision Clock Distribution +Denotes a lead(Pb)-free/RoHS-compliant package. Low-Jitter Data Repeater Functional Diagram QB0 QA0 V CC V CC QB0 QA0 QB1 QA1 75k 75k QB1 QA1 CLKB CLKA QB2 QA2 CLKB CLKA QB2 QA2 75k 75k 75k 75k QB3 QA3 QB3 QA3 V V EE EE V V EE EE QB4 V BB QA4 QB4 QA4 Pin Configuration appears at end of data sheet. Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com.Dual 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Drivers ABSOLUTE MAXIMUM RATINGS V - V ...............................................................................4.1V Junction-to-Ambient Thermal Resistance (T ) (Note 1) CC EE JA Inputs (CLK , CLK ).............................V - 0.3V to V + 0.3V 32-Pin LQFP .............................................................48.4C/W EE CC CLK to CLK ....................................................................3.0V 32-Pin TQFN ................................................................29C/W Continuous Output Current.................................................50mA Operating Temperature Range ...........................-40C to +85C Surge Output Current........................................................100mA Junction Temperature......................................................+150C V Sink/Source Current ...............................................0.65mA Storage Temperature Range .............................-65C to +150C BB Continuous Power Dissipation (T = +70C) ESD Protection A 32-Pin LQFP (derate 20.7mW/C above +70C) ....1652.9mW Human Body Model (CLK , CLK , Q , Q ) ........................2kV 32-Pin TQFN (derate 34.5mW/C above +70C)....2758.6mW Soldering Temperature (10s)...........................................+300C Junction-to-Case Thermal Resistance (T ) (Note A) JC 32-Pin LQFP ................................................................12C/W 32-Pin TQFN ..................................................................2C/W Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four- layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (V - V = +2.25V to +3.8V, outputs loaded with 50 1% to V - 2V.) (Notes 25) CC EE CC -40C +25C +85C PARAMETER SYMBOL CONDITIONS UNITS MIN MAX MIN MAX MIN MAX INPUTS (CLK , CLK ) V B B V - V - V - CC CC CC MAX9312 V V V CC CC CC connected 1.23 1.23 1.23 Single-Ended to CLK Input High V V IH (V for V IL B B Voltage V - V - V - CC CC CC connected MAX9314 V V V CC CC CC 1.165 1.165 1.165 to C LK ) V B B V - V - V - CC CC CC MAX9312 V V V EE EE EE connected 1.62 1.62 1.62 Single-Ended to CLK Input Low V V IL (V for V IL B B Voltage V - V - V - CC CC CC connected MAX9314 V V V EE EE EE 1.475 1.475 1.475 to C LK ) High Voltage of V + V + V + EE EE EE V V V V V IHD CC CC CC Differential Input 1.2 1.2 1.2 Low Voltage of V - V - V - CC CC CC V V V V V ILD EE EE EE Differential Input 0.095 0.095 0.095 V - V - V - CC CC CC For V - V < 3.0V 0.095 0.095 0.095 Differential Input V - CC EE IHD V V V V EE EE EE Voltage V ILD For V - V 3.0V 0.095 3.0 0.095 3.0 0.095 3.0 CC EE Input High I 150 150 150 A IH Current CLK Input Low I -10 +10 -10 +10 -10 +10 A ILCLK Current 2 MAX9312/MAX9314