Click here for production status of specific part numbers. MAX32520 ChipDNA Secure Arm Cortex M4 Microcontroller General Description Benefits and Features DeepCover embedded security solutions cloak sensitive High-Efficiency Microcontroller for Secure Element IoT data under multiple layers of advanced physical security Arm Cortex-M4F with FPU Up to 120MHz to provide the most secure key storage possible. 16KB Unified Code Cache 2MB PUF Encrypted Flash Memory with Cache The DeepCover secure microcontroller MAX32520 pro- Provides Ultimate Firmware IP Protection vides an interoperable, secure, and cost-effective solution Low Latency On-the-Fly Decryption of Flash to build new generations of trusted embedded systems Execution and communication devices such as IoT, IoT gateways, 136KB SRAM + 34KB ECC and wireless access points. 8KB User-Programmable OTP The MAX32520 incorporates Maxim s patented Secure Element ChipDNA PUF technology. ChipDNA technology in- PUF-Based Keys volves a physically unclonable function (PUF) that enables For Internal Flash Encryption cost-effective protection against invasive physical attacks. For Strong Device Authentication Using the random variation of semiconductor device char- Secure Boot Loader with Public Key Authentication acteristics that naturally occur during wafer fabrication, the and Serial Flash Emulation ChipDNA circuit generates a unique output value that is AES, SHA, and ECDSA Accelerators repeatable over time, temperature, and operating voltage. Hardware True Random Number Generator Attempts to probe or observe ChipDNA operation modifies SP800-90B Compliant Entropy Source the underlying circuit characteristics, preventing discovery SP800-90A Compliant DRBG of the unique value used by the chip cryptographic func- Die Shield tions. The MAX32520 utilizes the ChipDNA output as key Temperature and Voltage Tamper Monitor content to cryptographically secure all device stored da- External Tamper Sensor with Random Dynamic ta including user firmware. User firmware encryption pro- Pattern vides ultimate software IP protection. The ChipDNA can also generate a private key for the ECDSA signing opera- Power Management Maximizes Operating Time for tion. Battery Applications Single 3.3V/2.5V/1.8V Supply The MAX32520 integrates an Arm Cortex -M4 proces- Down to 3.2A Backup Mode sor, 2MB of Flash, 136KB of system RAM + 34KB ECC, 15s Wake-Up Time from Standby Mode 8KB of one-time-programmable (OTP) memory and Clock Gating, Power Gating, Registers, and 128KB of boot ROM. Memory Retention Modes The MAX32520 provides a FIPS/NIST compliant TRNG, Multiple Peripherals for System Control environmental and tamper detection circuitry to facilitate One UART system-level security. 2 One I C Interface Multiple high-speed interfaces are supported including QSPI 2 SPI, UART, and an I C. The four on-chip timers also sup- Four Timers with PWM Capability port PWM output generation for direct control of external Up to 27 General-Purpose I/O Pins with Selectable devices. One of the SPI ports has a serial flash emulation Output Driver Strength mode allowing direct code fetching enabling secure boot 4-Channel DMA Controller for a host microcontroller. 4-Pin JTAG Applications Ordering Information appears at end of data sheet. Embedded Connected Systems Arm and Cortex are registered trademarks of Arm Limited Secure Industrial Appliances, Sensors, and (or its subsidiaries) in the US and/or elsewhere. Controllers IoT Nodes and Gateways DeepCover is a registered trademark and ChipDNA is a Embedded Communication Equipment (Routers, trademark of Maxim Integrated Products, Inc. Gateways, etc.) Set-Top Boxes 19-100583 Rev 0 6/19MAX32520 ChipDNA Secure Arm Cortex M4 Microcontroller Simplified Block Diagram MAX32520 120MHz ARM CORTEX -M4 2 1 I C MASTER/SLAVE WITH FPU 7.3728MHz SHARED PAD 120MHz FUNCTIONS 8kHz NVIC TIMERS/PWM 1 2-WIRE UART CAPTURE/ MEMORY COMPARE POWER-ON RESET, GPIO/ BROWNOUT MONITOR, SPI FLASH RSTN 1 x SPI MASTER/SLAVE ALTERNATE 2 SUPPLY VOLTAGE I C 2MB (4 CS) FUNCTION MONITORS UART DUAL BANK UP TO 27 JTAG CACHE 1 x SPI/QSPI MASTER/ VDD MEMORY SLAVE (2 CS) EXTERNAL DECRYPTION UNIT INTERRUPTS SERIAL FLASH REG SINGLE OUTPUT EMULATION VOLTAGE CACHE 16KB EXTERNAL REGULATION V SSA TAMPER & POWER CONTROL 4 32-BIT TIMERS SRAM VDDA 170KB (SEC-DED) SECURITY ROM 128KB ENVIRONMENTAL, AES 128, 192, 256 EXTERNAL SENSORS & OTP 8KB SHA-1/256/384/512 DIE MESH CORE I/O ANALOG CHIP DNA PHYSICALLY DES, 3DES UNCLONABLE FAULT DETECTORS 4-CH DUAL DMA FUNCTION(PUF) FLASH ENCRYPTION KEY ECDSA 2 WATCHDOG ECDSA SIGNING KEY (UP TO P-521) TIMER TRNG RSA (SOFT) SP-800-90B, SP-800-90A (UP TO 4096) www.maximintegrated.com Maxim Integrated 2 MULTI-LAYER BUS MATRIX AHB/APB Tx/Rx Tx/Rx Tx/Rx Tx/Rx FIFO FIFO FIFO FIFO